參數(shù)資料
型號(hào): MPC885ZP80
廠商: 飛思卡爾半導(dǎo)體(中國(guó))有限公司
元件分類: 圓形連接器
英文描述: Circular Connector; Body Material:Aluminum; Series:PT07; Number of Contacts:12; Connector Shell Size:14; Connecting Termination:Solder; Circular Shell Style:Jam Nut Receptacle; Circular Contact Gender:Socket
中文描述: 硬件規(guī)格
文件頁(yè)數(shù): 53/92頁(yè)
文件大小: 1499K
代理商: MPC885ZP80
MPC885/MPC880 Hardware Specifications, Rev. 3
53
Freescale Semiconductor
CPM Electrical Characteristics
75
L1RSYNC, L1TSYNC rise/fall time
15.00
ns
76
L1RXD valid to L1CLK edge (L1RXD setup time)
17.00
ns
77
L1CLK edge to L1RXD invalid (L1RXD hold time)
13.00
ns
78
L1CLK edge to L1ST(1–4) valid
4
10.00
45.00
ns
78A
L1SYNC valid to L1ST(1–4) valid
10.00
45.00
ns
79
L1CLK edge to L1ST(1–4) invalid
10.00
45.00
ns
80
L1CLK edge to L1TXD valid
10.00
55.00
ns
80A
L1TSYNC valid to L1TXD valid
4
10.00
55.00
ns
81
L1CLK edge to L1TXD high impedance
0.00
42.00
ns
82
L1RCLK, L1TCLK frequency (DSC =1)
16.00 or
SYNCCLK
/2
MHz
83
L1RCLK, L1TCLK width low (DSC =1)
P + 10
ns
83a
L1RCLK, L1TCLK width high (DSC = 1)
3
P + 10
ns
84
L1CLK edge to L1CLKO valid (DSC = 1)
30.00
ns
85
L1RQ valid before falling edge of L1TSYNC
4
1.00
L1TCLK
86
L1GR setup time
2
42.00
ns
87
L1GR hold time
42.00
ns
88
L1CLK edge to L1SYNC valid (FSD = 00) CNT = 0000, BYT = 0,
DSC = 0)
0.00
ns
1
The ratio SyncCLK/L1RCLK must be greater than 2.5/1.
2
These specs are valid for IDL mode only.
3
Where P = 1/CLKOUT. Thus for a 25-MHz CLKO1 rate, P = 40 ns.
4
These strobes and TxD on the first bit of the frame become valid after L1CLK edge or L1SYNC, whichever comes later.
Table 21. SI Timing (continued)
Num
Characteristic
All Frequencies
Unit
Min
Max
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