參數(shù)資料
型號: MPC93R51ACR2
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 12/13頁
文件大?。?/td> 0K
描述: IC PLL CLK DRIVER LV 32-LQFP
標(biāo)準(zhǔn)包裝: 2,000
類型: PLL 時鐘發(fā)生器
PLL: 帶旁路
輸入: LVCMOS,LVPECL
輸出: LVCMOS
電路數(shù): 1
比率 - 輸入:輸出: 2:9
差分 - 輸入:輸出: 是/無
頻率 - 最大: 240MHz
除法器/乘法器: 是/是
電源電壓: 3.135 V ~ 3.465 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 32-LQFP
供應(yīng)商設(shè)備封裝: 32-TQFP(7x7)
包裝: 帶卷 (TR)
MPC93R51 REVISION 4 JANUARY 31, 2013
8
2013 Integrated Device Technology, Inc.
MPC93R51 Data Sheet
LOW VOLTAGE PLL CLOCK DRIVER
second level of isolation may be required. The simple but
effective form of isolation is a power supply filter on the VCCA
pin for the MPC93R51.
Figure 6 illustrates a typical power supply filter scheme.
The MPC93R51 frequency and phase stability is most
susceptible to noise with spectral content in the 100 kHz to 20
MHz range; therefore, the filter should be designed to target
this range. The key parameter that needs to be met in the
final filter design is the DC voltage drop across the series filter
resistor RF. From the data sheet, the ICCA current (the current
sourced through the VCCA pin) is typically 3 mA (5 mA
maximum), assuming that a minimum of 3.0 V must be
maintained on the VCCA pin. The resistor RF shown in
Figure 6 must have a resistance of 5-15
to meet the
voltage drop criteria.
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