參數(shù)資料
型號(hào): MPC93R51ACR2
廠商: IDT, Integrated Device Technology Inc
文件頁(yè)數(shù): 2/13頁(yè)
文件大?。?/td> 0K
描述: IC PLL CLK DRIVER LV 32-LQFP
標(biāo)準(zhǔn)包裝: 2,000
類(lèi)型: PLL 時(shí)鐘發(fā)生器
PLL: 帶旁路
輸入: LVCMOS,LVPECL
輸出: LVCMOS
電路數(shù): 1
比率 - 輸入:輸出: 2:9
差分 - 輸入:輸出: 是/無(wú)
頻率 - 最大: 240MHz
除法器/乘法器: 是/是
電源電壓: 3.135 V ~ 3.465 V
工作溫度: 0°C ~ 70°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 32-LQFP
供應(yīng)商設(shè)備封裝: 32-TQFP(7x7)
包裝: 帶卷 (TR)
MPC93R51 REVISION 4 JANUARY 31, 2013
10
2013 Integrated Device Technology, Inc.
MPC93R51 Data Sheet
LOW VOLTAGE PLL CLOCK DRIVER
Figure 8. Single versus Dual Waveforms
Since this step is well above the threshold region it will not
cause any false clock triggering; however, designers may be
uncomfortable with unwanted reflections on the line. To better
match the impedances when driving multiple lines, the
situation in Figure 9 should be used. In this case, the series
terminating resistors are reduced such that when the parallel
combination is added to the output buffer impedance, the line
impedance is perfectly matched.
Figure 9. Optimized Dual Line Termination
Figure 10. CLK MPC93R51 AC Test Reference for VCC = 3.3 V
Figure 11. PCLK MPC9R351 AC Test Reference
TIME (ns)
VOL
TAGE
(V)
3.0
2.5
2.0
1.5
1.0
0.5
0
2
4
6
8
10
12
14
OutB
tD = 3.9386
OutA
tD = 3.8956
In
14
MPC93R51
OUTPUT
BUFFER
RS = 22
ZO = 50
RS = 22
ZO = 50
14
+ 22 || 22 = 50 || 50
25
= 25
Pulse
Generator
Z = 50
RT = 50
ZO = 50
RT = 50
ZO = 50
MPC93R51 DUT
VTT
Differential Pulse
Generator
Z = 50
RT = 50
ZO = 50
RT = 50
ZO = 50
MPC93R51 DUT
VTT
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