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參數(shù)資料
| 型號(hào)： | MPC9653FA |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 時(shí)鐘及定時(shí) |
| 英文描述： | 9653 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
| 封裝： | 7 X 7 MM, PLASTIC, LQFP-32 |
| 文件頁(yè)數(shù)： | 1/9頁(yè) |
| 文件大小： | 159K |
| 代理商： | MPC9653FA |
520
FREESCALE SEMICONDUCTOR ADVANCED CLOCK DRIVERS DEVICE DATA
Freescale Semiconductor, Inc.
TECHNICAL DATA
Order number: MPC9653
Rev 2, 02/2002
3.3 V 1:8 LVCMOS PLL Clock
Generator
The MPC9653 is a 3.3 V compatible, 1:8 PLL based clock generator and
zero-delay buffer targeted for high performance low-skew clock distribution in
mid-range to high-performance telecom, networking and computing
applications. With output frequencies up to 125 MHz and output skews less
than 150 ps the device meets the needs of the most demanding clock
applications.
Features
1:8 PLL based low-voltage clock generator
Supports zero-delay operation
3.3 V power supply
Generates clock signals up to 125 MHz
Maximum output skew of 150 ps
Differential LVPECL reference clock input
External PLL feedback
Drives up to 16 clock lines
32 lead LQFP packaging
Ambient temperature range 0°C to +70°C
Pin and function compatible to the MPC953
Functional Description
The MPC9653 utilizes PLL technology to frequency lock its outputs onto an input reference clock. Normal operation of the
MPC9653 requires the connection of the QFB output to the feedback input to close the PLL feedback path (external feedback). With
the PLL locked, the output frequency is equal to the reference frequency of the device and VCO_SEL selects the operating frequency
range of 25 to 62.5 MHz or 50 to 125 MHz. The two available post-PLL dividers selected by VCO_SEL (divide-by-4 or divide-by-8)
and the reference clock frequency determine the VCO frequency. Both must be selected to match the VCO frequency range. The
internal VCO of the MPC9653 is running at either 4x or 8x of the reference clock frequency.
The MPC9653 has a differential LVPECL reference input along with an external feedback input. The device is ideal for use as a
zero delay, low skew fanout buffer. The device performance has been tuned and optimized for zero delay performance.
The PLL_EN and BYPASS controls select the PLL bypass configuration for test and diagnosis. In this configuration, the selected
input reference clock is bypassing the PLL and routed either to the output dividers or directly to the outputs. The PLL bypass config-
urations are fully static and the minimum clock frequency specification and all other PLL characteristics do not apply. The outputs can
be disabled (high-impedance) and the device reset by asserting the MR/OE pin. Asserting MR/OE also causes the PLL to loose lock
due to missing feedback signal presence at FB_IN. Deasserting MR/OE will enable the outputs and close the phase locked loop, en-
abling the PLL to recover to normal operation.
The MPC9653 is fully 3.3 V compatible and requires no external loop filter components. The inputs (except PCLK) accept LVCMOS
except signals while the outputs provide LVCMOS compatible levels with the capability to drive terminated 50
transmission lines.
For series terminated transmission lines, each of the MPC9653 outputs can drive one or two traces giving the devices an effective
fanout of 1:16. The device is packaged in a 7x7 mm2 32-lead LQFP package.
MPC9653
FA SUFFIX
32 LEAD LQFP PACKAGE
CASE 873A-03
LOW VOLTAGE
3.3 V LVCMOS 1:8
PLL CLOCK GENERATOR
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MPC9658 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:3.3V 1:10 LVCMOS PLL Clock Generator |
| MPC9658AC | 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 FSL 1-10 LVCMOS Zero Delay Buffer RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| MPC9658ACR2 | 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 FSL 1-10 LVCMOS Zero Delay Buffer RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| MPC9658FA | 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 2.5 3.3V 250MHz Clock Generator RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| MPC9658FAR2 | 制造商:Integrated Device Technology Inc 功能描述:PLL Clock Driver Single 32-Pin LQFP T/R 制造商:Integrated Device Technology Inc 功能描述:MPC9658FAR2 - Tape and Reel |
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