參數(shù)資料
型號： MQ80C52CXXX-25/883:D
廠商： ATMEL CORP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 25 MHz, MICROCONTROLLER, CQFP44
封裝： CERAMIC, QFP-44
文件頁數(shù)： 138/170頁
文件大?。?/td> 25028K
222
8272E–AVR–04/2013
ATmega164A/PA/324A/PA/644A/PA/1284/P
21.7
Transmission modes
The TWI can operate in one of four major modes. These are named Master Transmitter (MT),
Master Receiver (MR), Slave Transmitter (ST) and Slave Receiver (SR). Several of these
modes can be used in the same application. As an example, the TWI can use MT mode to write
data into a TWI EEPROM, MR mode to read the data back from the EEPROM. If other masters
are present in the system, some of these might transmit data to the TWI, and then SR mode
would be used. It is the application software that decides which modes are legal.
The following sections describe each of these modes. Possible status codes are described
along with figures detailing data transmission in each of the modes. These figures contain the
following abbreviations:
S:
START condition
Rs:
REPEATED START condition
R:
Read bit (high level at SDA)
W:
Write bit (low level at SDA)
A:
Acknowledge bit (low level at SDA)
A:
Not acknowledge bit (high level at SDA)
Data: 8-bit data byte
P:
STOP condition
SLA: Slave Address
In Figure 21-12 on page 225 to Figure 21-18 on page 234, circles are used to indicate that the
TWINT Flag is set. The numbers in the circles show the status code held in TWSR, with the
prescaler bits masked to zero. At these points, actions must be taken by the application to con-
tinue or complete the TWI transfer. The TWI transfer is suspended until the TWINT Flag is
cleared by software.
When the TWINT Flag is set, the status code in TWSR is used to determine the appropriate soft-
ware action. For each status code, the required software action and details of the following serial
transfer are given in Table 21-2 on page 224 to Table 21-5 on page 233. Note that the prescaler
bits are masked to zero in these tables.
21.7.1
Master Transmitter mode
In the Master Transmitter mode, a number of data bytes are transmitted to a Slave Receiver
(see Figure 21-11 on page 223). In order to enter a Master mode, a START condition must be
transmitted. The format of the following address packet determines whether Master Transmitter
or Master Receiver mode is to be entered. If SLA+W is transmitted, MT mode is entered, if
SLA+R is transmitted, MR mode is entered. All the status codes mentioned in this section
assume that the prescaler bits are zero or are masked to zero.
相關(guān)PDF資料
PDF描述
MQ80C52TXXX-16:RD 8-BIT, MROM, 16 MHz, MICROCONTROLLER, CQFP44
MR80C52CXXX-25/883:RD 8-BIT, MROM, 25 MHz, MICROCONTROLLER, CQCC44
MR80C52TXXX-25SHXXX:R 8-BIT, MROM, 25 MHz, MICROCONTROLLER, CQCC44
MC80C32-16SHXXX:D 8-BIT, 16 MHz, MICROCONTROLLER, CDIP40
MD80C52EXXX-25/883:D 8-BIT, MROM, 25 MHz, MICROCONTROLLER, CDIP40
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