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參數(shù)資料
| 型號： | MQ80C52TXXX-12SB |
| 廠商： | TEMIC SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 12 MHz, MICROCONTROLLER, CQFP44 |
| 文件頁數(shù)： | 30/46頁 |
| 文件大?。?/td> | 4720K |
| 代理商： | MQ80C52TXXX-12SB |
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35
ATtiny20 [DATASHEET]
8235E–AVR–03/2013
8.5.2
RSTFLR – Reset Flag Register
The Reset Flag Register provides information on which reset source caused an MCU Reset.
Bits 7:4 – Res: Reserved Bits
These bits are reserved and will always read as zero.
Bit 3 – WDRF: Watchdog Reset Flag
This bit is set if a Watchdog Reset occurs. The bit is reset by a Power-on Reset, or by writing a logic zero to the flag.
Bit 2 – BORF: Brown-Out Reset Flag
This bit is set if a Brown-Out Reset occurs. The bit is reset by a Power-on Reset, or by writing a logic zero to the flag.
Bit 1 – EXTRF: External Reset Flag
This bit is set if an External Reset occurs. The bit is reset by a Power-on Reset, or by writing a logic zero to the flag.
Bit 0 – PORF: Power-On Reset Flag
This bit is set if a Power-on Reset occurs. The bit is reset only by writing a logic zero to the flag.
To make use of the Reset Flags to identify a reset condition, the user should read and then reset the RSTFLR as early as
possible in the program. If the register is cleared before another reset occurs, the source of the reset can be found by
examining the Reset Flags.
1
0
1
0
Reserved
1
0
1
0
1
0
1
0
1
WDP3
WDP2
WDP1
WDP0
Number of
WDT Oscillator Cycles
Typical Time-out
at V
CC = 5.0V
Bit
76543210
––––
WDRF
BORF
EXTRF
PORF
RSTFLR
Read/Write
RRRR
R/W
Initial Value
0000
XXXX
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