參數(shù)資料
型號: MR80C52TXXX-30SBD
廠商: TEMIC SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 30 MHz, MICROCONTROLLER, CQCC44
文件頁數(shù): 7/141頁
文件大?。?/td> 7628K
代理商: MR80C52TXXX-30SBD
16
2486AA–AVR–02/2013
ATmega8(L)
When using the SEI instruction to enable interrupts, the instruction following SEI will be exe-
cuted before any pending interrupts, as shown in the following example.
Interrupt Response
Time
The interrupt execution response for all the enabled Atmel
AVR interrupts is four clock cycles
minimum. After four clock cycles, the Program Vector address for the actual interrupt handling
routine is executed. During this 4-clock cycle period, the Program Counter is pushed onto the
Stack. The Vector is normally a jump to the interrupt routine, and this jump takes three clock
cycles. If an interrupt occurs during execution of a multi-cycle instruction, this instruction is com-
pleted before the interrupt is served. If an interrupt occurs when the MCU is in sleep mode, the
interrupt execution response time is increased by four clock cycles. This increase comes in addi-
tion to the start-up time from the selected sleep mode.
A return from an interrupt handling routine takes four clock cycles. During these four clock
cycles, the Program Counter (2 bytes) is popped back from the Stack, the Stack Pointer is incre-
mented by 2, and the I-bit in SREG is set.
Assembly Code Example
sei
; set global interrupt enable
sleep
; enter sleep, waiting for interrupt
; note: will enter sleep before any pending
; interrupt(s)
C Code Example
_SEI(); /* set global interrupt enable */
_SLEEP(); /* enter sleep, waiting for interrupt */
/* note: will enter sleep before any pending interrupt(s) */
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