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參數(shù)資料
| 型號(hào)： | MSC23S4721E-8BS18 |
| 廠商： | OKI SEMICONDUCTOR CO., LTD. |
| 英文描述： | 4194304 Word x 72 Bit Synchronous Dynamic RAM Module (2BANK)(4M字×72位同步動(dòng)態(tài)RAM模塊) |
| 中文描述： | 4194304字× 72位同步動(dòng)態(tài)隨機(jī)存儲(chǔ)器模塊（2BANK）（4分字× 72位同步動(dòng)態(tài)內(nèi)存模塊） |
| 文件頁(yè)數(shù)： | 7/11頁(yè) |
| 文件大小： | 77K |
| 代理商： | MSC23S4721E-8BS18 |
MSC23S4721E-8BS18 (98.07.17)
Page 7/11
MODE SET ADDRESS KEYS
/CAS Latency
A5
A4
0
0
1
1
0
0
1
1
Burst Type
A3
0
1
Burst Length
A0
0
1
0
1
0
Reserved
1
Reserved
0
Reserved
1
Full Page
A6
0
0
0
0
1
1
1
1
CL
BT
A2
0
0
0
0
1
1
1
1
A1
0
0
1
1
0
0
1
1
BT=0
1
2
4
8
BT=1
1
2
4
8
Reserved
Reserved
Reserved
Reserved
0
1
0
1
0
1
0
1
Reserved
Reserved
2
3
Reserved
Reserved
Reserved
Reserved
Sequential
Interleave
Note: A7, A8, A9, A10 and A11 should stay "L" during mode set cycle.
POWER ON SEQUENCE
1. With inputs in NOP state, turn on the power supply and start the system clock.
2. After the V
CC
voltage has reached the specified level, pause for 200us or more
with the input kept in NOP state.
3. Issue the precharge all bank command.
4. Apply a CBR auto-refresh eight or more times.
5. Enter the mode register setting command.
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