- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄378004 > MSM5118165F (OKI SEMICONDUCTOR CO., LTD.) 1,048,576-Word 】 16-Bit DYNAMIC RAM : FAST PAGE MODE TYPE WITH EDO PDF資料下載
參數(shù)資料
| 型號： | MSM5118165F |
| 廠商： | OKI SEMICONDUCTOR CO., LTD. |
| 英文描述： | 1,048,576-Word 】 16-Bit DYNAMIC RAM : FAST PAGE MODE TYPE WITH EDO |
| 中文描述： | 1,048,576詞】16位動態(tài)隨機(jī)存儲器：快速頁面模式型與江戶 |
| 文件頁數(shù)： | 8/15頁 |
| 文件大小： | 178K |
| 代理商： | MSM5118165F |
FEDD5118165F-01
1
Semiconductor
MSM5118165F
8/15
Notes: 1. A start-up delay of 200
μ
s is required after power-up, followed by a minimum of eight initialization
cycles (
RAS
-only refresh or
CAS
before
RAS
refresh) before proper device operation is achieved.
2. The AC characteristics assume t
T
= 2ns.
3. V
IH
(Min.) and V
IL
(Max.) are reference levels for measuring input timing signals. Transition times (t
T
)
are measured between V
IH
and V
IL
.
4. -50 is measured with a load circuit equivalent to 2 TTL load and 50pF, and -60/-70 is measured with a
load circuit equivalent to 2 TTL load and 100pF.
5. Operation within the t
RCD
(Max.) limit ensures that t
RAC
(Max.) can be met.
t
RCD
(Max.) is specified as a reference point only. If t
RCD
is greater than the specified t
RCD
(Max.) limit,
then the access time is controlled by t
CAC
.
6. Operation within the t
RAD
(Max.) limit ensures that t
RAC
(Max.) can be met.
t
RAD
(Max.) is specified as a reference point only. If t
RAD
is greater than the specified t
RAD
(Max.) limit,
then the access time is controlled by t
AA
.
7. t
CEZ
(Max.), t
REZ
(Max.), t
WEZ
(Max.), and t
OEZ
(Max.) define the time at which the output achieved the
open circuit condition and are not referenced to output voltage levels.
8. t
CEZ
, and t
REZ
must be satisfied for open circuit condition.
9. t
RCH
or t
RRH
must be satisfied for a read cycle.
10.t
WCS
, t
CWD
, t
RWD
, t
AWD
and t
CPWD
are not restrictive operating parameters. They are included in the data
sheet as electrical characteristics only. If t
WCS
≥
t
WCS
(Min.), then the cycle is an early write cycle and
the data out will remain open circuit (high impedance) throughout the entire cycle. If t
CWD
≥
t
CWD
(Min.), t
RWD
≥
t
RWD
(Min.), t
AWD
≥
t
AWD
(Min.) and t
CPWD
≥
t
CPWD
(Min.), then the cycle is a read modify
write cycle and data out will contain data read from the selected cell; if neither of the above sets of
conditions is satisfied, then the condition of the data out (at access time) is indeterminate.
11.These parameters are referenced to the
UCAS
and
LCAS
, leading edges in an early write cycle, and to
the
WE
leading edge in an
OE
control write cycle, or a read modify write cycle.
12.These parameters are determined by the falling edge of either
UCAS
or
LCAS
, whichever is earlier.
13.These parameters are determined by the rising edge of either
UCAS
or
LCAS
, whichever is later.
14.t
CWL
should be satisfied by both
UCAS
and
LCAS
.
15.t
CP
is determined by the time both
UCAS
and
LCAS
are high.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MSM512100L-XXSJ | 2,097,152-Word X 1-Bit DYNAMIC RAM : FAST PAGE MODE TYPE |
| MSM512100-XXSJ | 2,097,152-Word X 1-Bit DYNAMIC RAM : FAST PAGE MODE TYPE |
| MSM512100-60SJ | 2,097,152-Word X 1-Bit DYNAMIC RAM : FAST PAGE MODE TYPE |
| MSM512100-70SJ | 2,097,152-Word X 1-Bit DYNAMIC RAM : FAST PAGE MODE TYPE |
| MSM512100-80SJ | 2,097,152-Word X 1-Bit DYNAMIC RAM : FAST PAGE MODE TYPE |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MSM5118165F-50T3-K-7 | 制造商:ROHM Semiconductor 功能描述: |
| MSM5118165F-50TSKR1 | 制造商:ROHM Semiconductor 功能描述: |
| MSM5118165F-60J3 | 制造商:ROHM Semiconductor 功能描述: |
| MSM5118165F-60J3-7 | 功能描述:IC DRAM 16MBIT 60NS 42SOJ RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:- 標(biāo)準(zhǔn)包裝:96 系列:- 格式 - 存儲器:閃存 存儲器類型:FLASH 存儲容量:16M（2M x 8，1M x 16） 速度:70ns 接口:并聯(lián) 電源電壓:2.65 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:48-TFSOP（0.724"，18.40mm 寬） 供應(yīng)商設(shè)備封裝:48-TSOP 包裝:托盤 |
| MSM5118165F-60J3DR1 | 制造商:ROHM Semiconductor 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。