參數(shù)資料
型號(hào)： MSM6542-03RS
廠商： OKI ELECTRIC INDUSTRY CO LTD
元件分類： 時(shí)鐘/數(shù)據(jù)恢復(fù)及定時(shí)提取
英文描述： 0 TIMER(S), REAL TIME CLOCK, PDIP24
封裝： 0.600 INCH, PLASTIC, DIP-24
文件頁(yè)數(shù)： 17/54頁(yè)
文件大小： 406K
代理商： MSM6542-03RS
Semiconductor
MSM6542-01/02/03
91
b)
30-s ADJ (D
1) (30-s ADJustment)
When 1 is written in this bit, software makes a 30-s adjustment. For 125
s after this writing,
registers R-S
1 to R-W (at addresses 0 to C in bank 0 in the register table) cannot be read or
written due to limitations to the inside of the IC. When the CAL bit of the C
E' register is 0,
however, registers R-D
1 to R-Y10 (at addresses 6 to B in bank 0) which can be used as RAM
are as can be read or written during 30-s adjustment. The bit remains at 1 for up to 250
s
after 1 is written in the bit. Then, the bit is automatically reset at 0. Confirm that the bit is
automatically reset at 0 before manipulating registers R-S
1 to R-Y10 and R-W (when CAL is
0, R-S
1 to R-H10 and R-W).
The 30-s ADJ bit is also set at 1 when hardware makes a 30-s adjustment. In this case too,
confirm that the bit is automatically reset at 0 before manipulating registers R-S
1 to R-Y10
and R-W (when CAL is 0, R-S
1 to R-H10 and R-W).
When the 30-s ADJ bit is set at 1, the D
0 (READ FLAG) of the bit CF register is also set at 1.
c)
STOP (D
2)
This bit is used for the integrating clock operated by software. When the bit is set at 1,
clocking at 4096 Hz and lower stops. When the bit is set at 0, clocking is resumed.
For the MSM6542-3, the HD/SFT bit of the C
E' register can be used to select hardware or
software to implement the stop/restart function.
d)
BANK 1/0 (D
3)
When this bit is set at 1, bank 1 is selected. When it is set at 0, bank 0 is selected. The bit can
be set even in the data protect mode.
Registers A-S
1, A-S10, A-MI1, A-MI10, A-H1, A-H10, A-D1, A-D10, A-MO1, A-MO10, A-W
a)
The letter A followed by a hyphen (-) in these register names indicate an alarm register. S
1,
S
10, MI1, MI10, H1, H10, MO1, MO10, and W are abbreviations or Second1, Second10, MInute1,
MInute
10, Hour1, Hour10, Day1, Day10, MOnth1, MOnth10, and Week.
The value of each
register is weighted in BCD.
b)
The positive logic is used. For example, when (a-s
8, a-s4, a-s2, a-s1) is (1, 0, 0, 1), it indicates
9 seconds.
c)
An asterisk (*) in the alarm register table indicates the bit automatically set at 0 even though
the write data is 1. This is true when the alarm register is in the alarm setting range set by
the A-ENABLE register.
The registers outside the alarm setting range set by the A-ENABLE register are used as
RAM areas. The bits marked * in these RAM areas can be used for write and read
operations.
For more information, see the descriptions of "A-ENABLE."
d)
Be sure not to set non-existing data in alarm registers in the alarm setting range. Otherwise,
an alarm may not be generated.
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