Contents-3
Chapter 4
Memory Control Functions
4.1
Overview .......................................................................................................... 4-1
4.2
Memory Control Function Registers ................................................................ 4-1
4.3
ROM Window Function .................................................................................... 4-2
4.4
READY Function .............................................................................................. 4-4
4.4.1 ROM Ready Control Register (ROMRDY) .................................................. 4-4
4.4.2 RAM Ready Control Register (RAMRDY) .................................................. 4-5
4.5 WAIT Function .................................................................................................. 4-7
Chapter 5
Port Functions
5.1
Overview .......................................................................................................... 5-1
5.2
Hardware Configuration of Each Port .............................................................. 5-3
5.2.1 Type A (P0) ................................................................................................. 5-3
5.2.2 Type B (P1, P2, P3_1, P4) ......................................................................... 5-4
5.2.3 Type C (P3_2, P3_3) .................................................................................. 5-5
5.2.4 Type D
(P5, P6_0 to P6_3, P7, P8, P9_0, P9_1, P9_7,
P10_0 to P10_2, P10_7, P11) .................................................................... 5-6
5.2.5 Type E (P6_4 to P6_7, P9_2, P9_3, P10_3 to P10_5) ............................... 5-7
5.2.6 Type F (P12) ............................................................................................... 5-7
5.3
Port Registers .................................................................................................. 5-8
5.3.1 Port Data Registers (Pn:n = 0 to 12) ........................................................ 5-10
5.3.2 Port Mode Registers (PnIO:n = 0 to 11) ................................................... 5-10
5.3.3 Port Secondary Function Control Registers (PnSF:n = 0 to 11) ............... 5-11
5.4
Port 0 (P0) ...................................................................................................... 5-12
5.5
Port 1 (P1) ...................................................................................................... 5-14
5.6
Port 2 (P2) ...................................................................................................... 5-16
5.7
Port 3 (P3) ...................................................................................................... 5-18
5.8
Port 4 (P4) ...................................................................................................... 5-20
5.9
Port 5 (P5) ...................................................................................................... 5-22
5.10 Port 6 (P6) ...................................................................................................... 5-24
5.11 Port 7 (P7) ...................................................................................................... 5-26
5.12 Port 8 (P8) ...................................................................................................... 5-28
5.13 Port 9 (P9) ...................................................................................................... 5-30
5.14 Port 10 (P10) .................................................................................................. 5-32
5.15 Port 11 (P11) .................................................................................................. 5-34
5.16 Port 12 (P12) .................................................................................................. 5-36