參數(shù)資料
型號(hào)： MSM7662
廠(chǎng)商： OKI SEMICONDUCTOR CO., LTD.
英文描述： NTSC/PAL Digital Video Decoder(NTSC/PAL制式數(shù)字視頻譯碼器)
中文描述： NTSC / PAL數(shù)字視頻解碼器（的NTSC / PAL制式數(shù)字視頻譯碼器）
文件頁(yè)數(shù)： 16/48頁(yè)
文件大?。?/td> 369K
代理商： MSM7662
Semiconductor
MSM7662
16/47
5. Epilogue Block
The Epilogue Block outputs the UV signal from the Chrominance block and the Y signal from the
Luminance block in a format based on a signal obtained from the control register setting.
This block can select the following modes.
1) Output mode selection
1-1) ITU-RBT.656 (SAV, EAV, blank processing)
1-2) * 8-bit (YCbCr) output (2x pixel clock)
1-3) 16-bit (8-bit Y/8-bit CbCr) (pixel clock)
1-4) 24-bit RGB (8 bits each)
2) Enable Blue Back display when synchronization fails
OFF
ON*
3) Selection of YCbCr signal output format
YCbCr
4 : 2 : 2*
YCbCr
4 : 1 : 1
The chrominance signal (U, V component) outputs Cb and Cr data to the C pin in an output
format to be described later.
4) Selection of 8-bit chroma signal output format
Offset binary*
2's complement
5) Output pin enable selection
High-impedance
Output enable*
6) Multiplex signal (VBI data) detection level adjustment
The levels to detect multiplexed signals sent during the vertical blanking period are
configured to be variable. The binary values after input signals are A-to D converted are
employed as the levels to detect multiplexed signals, and the levels are set in eight steps with
respect to the SYNC tip level. (See page 26 and page 27)
7) Various mode detection
NTSC/PAL detection
Multiplex signal detection
HSYNC synchronization detection
Iunternal FIFO overflow detection
8) Output signal phase control
Y and C phases can each be adjusted in the range of –2 to +1 pixels.
synchronization with HSYNC_L, VSYNC_L
synchronization with HSYNC_L, VSYNC_L
synchronization with HSYNC_L, VSYNC_L
6. I
2
C Control Block
This serial interface block is based on the I
2
C standard of the Phillips Corporation.
This block only functions as a Slave-Receiver (write mode).
7. Test Control Block
This block is used to test the LSI chip. Normally this block is not used.
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