參數(shù)資料
型號： MSM80C51F-XXXRS
廠商： OKI ELECTRIC INDUSTRY CO LTD
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 12 MHz, MICROCONTROLLER, PDIP40
封裝： 0.600 INCH, PLASTIC, DIP-40
文件頁數(shù)： 38/39頁
文件大小： 355K
代理商： MSM80C51F-XXXRS
8/38
Semiconductor
MSM80C31F/80C51F
PIN DESCRIPTION
Symbol
Description
VSS
VCC
Ground potential
Supply voltage during Normal, Idle and Power Down operation
Port 0 is an 8-bit open-drain bidirectional I/O port. It is also the mutiplexed low-order address
and data bus during accesses to external memory.
Port 0.0
- 0.7
Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. It can drive CMOS inputs without
external pull-ups.
Port 1.0
- 1.7
Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. It outputs the high-order address
byte during accesses to external memory. It can drive CMOS inputs without external pull-ups.
Port 2.0
- 2.7
Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. It also provides various special
features, as shown below:
Port 3.0
- 3.7
Port Pin
P3.0
P3.1
P3.2
P3.3
P3.4
P3.5
P3.6
P3.7
Port 3 can drive CMOS inputs without external pull-ups.
Alternate Function
RXD
TXD
INT0
INT1
T0
T1
WR
RD
(serial input port)
(serial output port)
(external interrupt)
(Timer 0 external input)
(Timer 1 external input)
(external data memory write strobe)
(external data memory read strobe)
Reset input pin. A reset is accomplished by holding the RESET pin high for at least 1ms.
even if the oscillator has been stopped. The CPU responds by executing an internal reset. An
internal pull-down resistor permits Power-On reset using only a capacitor connected to VCC.
This pin does not receive the power down voltage since the function has been transferred to the
VCC pin.
Address Latch Enable. This output latches for latching the low byte of the address during
accesses to external memory. For this purpose, ALE is activated twice every machine cycle or
at a constant rate of 1/6th the oscillator frequency, except during an external memory access at
which time one ALE pulse is skipped. ALE can drive CMOS inputs without an external pull-up.
Program Store Enable output. This output is the read strobe to external program memory.
For this purpose,
PSEN is activated twice every machine cycle. (However, when executing out
of external program memory, two activations of
PSEN are skipped during each access to
external data memory.)
PSEN is not activated during fetches from internal program memory.
It can drive CMOS inputs without an external pull-up.
External Access input pin. When
EA is held high, the CPU executes out of internal program
memory (unless the program counter exceeds 0FFFH).
When
EA is held low, the CPU executes only out of external program memory.
EA must not be floated.
Crystal 1 pin. It is an input to the inverting amplifier which forms the internal oscillator.
Crystal 2 pin. It is an output of the inverting amplifier that forms the internal oscillator.
RESET
ALE
PSEN
EA
XTAL1
XTAL2
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