參數(shù)資料
型號: MSM80C88A-10JS
廠商: OKI ELECTRIC INDUSTRY CO LTD
元件分類: 微控制器/微處理器
英文描述: 8-BIT, 10 MHz, MICROPROCESSOR, PQCC44
封裝: 0.650 X 0.650 INCH, 1.27 MM PITCH, PLASTIC, QFJ-44
文件頁數(shù): 9/37頁
文件大?。?/td> 267K
代理商: MSM80C88A-10JS
17/37
Semiconductor
MSM80C88A-10RS/GS/JS
RQ/GT0
RQ/GT1
REQUEST/GRANT:Input/Output
These lines are used for Bus Request from other devices and Bus GRANT to other devices.
These lines are bidirectional and active low.
LOCK
LOCK:Output
This line is active low.
When this line is low, other devices cannot gain control of the bus.
This line is high impedance hold acknowledge.
QS0/QS1
QUEUE STATUS: Output
These are Queue Status Lines that indicate internal instruction queue status.
0
1 (HIGH)
1
First Byte of Op Code from Queue
0 (LOW)
No operation
QS1
1
0
1
0
QS0
Characteristics
Empty the Queue
Subsequent Byte from Queue
The following pin function descriptions are minimum mode only. Other pin functions are
already described.
IO/M
STATUS: Output
This line selects memory address space or I/O address space.
When this line is low, the CPU selects memory address space and when it is high, the CPU
selects I/O address space.
This line is high impedance during hold acknowledge.
WR
WRITE: Output
This line indicates that the CPU is in a memory or I/O write cycle.
This line is a write strobe signal when the CPU writes data to memory or an I/O device.
This line is active low. This line is high impedance during hold acknowledge.
INTA
INTERRUPT ACKNOWLEDGE: Output
This line is a read strobe signal for the interrupt acknowledge cycle.
This line is active low.
相關(guān)PDF資料
PDF描述
MSM80C88A-10GS-K 8-BIT, 10 MHz, MICROPROCESSOR, PQFP56
MSM81C55-5GS-2K 22 I/O, PIA-GENERAL PURPOSE, PQFP44
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參數(shù)描述
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