參數(shù)資料
型號: MSM82C37B-5GS-2K
廠商: LAPIS SEMICONDUCTOR CO LTD
元件分類: DMA控制器
英文描述: 4 CHANNEL(S), 5 MHz, DMA CONTROLLER, PQFP44
封裝: 9 X 10 MM, 0.80 MM PITCH, PLASTIC, QFP-44
文件頁數(shù): 16/35頁
文件大?。?/td> 330K
代理商: MSM82C37B-5GS-2K
22/33
Semiconductor
MSM82C37B-5RS/GS/VJS
Command Register
This 8-bit write-only register prescribes DMA operations for all MSM82C37B-5 channels. An
outline of all bits is given in Figure 3. When the controller is disabled by setting D B2, there is
no HRQ output even if DMA request is active.
DREQ and DACK signals may be active high or active low by setting D B6 and DB7.
DB7
0: Memory-Memory Transfer Disabled
1: Memory-Memory Transfer Enabled
DB6
DB5
DB4
DB3
DB2
DB1
DB0
0: Channel 0 Address Hold Disabled
1: Channel 0 Address Hold Enabled
0: Controller Enabled
1: Controller Disabled
0: Normal Timing
1: Compressed Timing
0: Fixed Priority
1: Rotating Priority
0: Normal Write Pulse Width
1: Extended Write Pulse Width
0: DREQ Sense Active "H"
1: DREQ Sense Active "L"
0: DACK Sense Active "L"
1: DACK Sense Active "H"
(Invalid when DB0 = "0")
(Invalid when DB0 = "1")
Figure 3 Command Register
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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