參數(shù)資料
型號(hào): MSM82C55A-2RS
廠商: LAPIS SEMICONDUCTOR CO LTD
元件分類: 微控制器/微處理器
英文描述: 24 I/O, PIA-GENERAL PURPOSE, PDIP40
封裝: 0.600 INCH, 2.54 MM PITCH, PLASTIC, DIP-40
文件頁(yè)數(shù): 16/27頁(yè)
文件大?。?/td> 207K
代理商: MSM82C55A-2RS
22/26
Semiconductor
MSM82C55A-2RS/GS/VJS
Differences between MSM82C55A-5 and MSM82C55A-2
1) Manufacturing Process
These devices use a 3 m Si-Gate CMOS process technology.
The MSM82C55A-2 is about 7% smaller in chip size than the MSM82C55A-5 as the MSM82C55A-
2 changed its output characteristics.
2) Function
The above function has been improved to remove bugs and other logics are not different between
the two devices.
3) Electrical Characteristics
3-1) DC Characteristics
As shown above, the DC characteristics of the MSM82C55A-2 satisfies the DC characteristics of the
MSM82C55A-5.
3-2) AC Characteristics
Item
MSM82C55A-5
MSM82C55A-2
Internal latch during writing into
the command register
Only ports A and C are cleared.
Port B is not cleared.
All ports are cleared.
Parameter
Symbol
MSM82C55A-5
MSM82C55A-2
''L'' Output Voltage
0.45 V
(IOL = +2.5 mA)
0.40 V
(IOL = +2.5 mA)
3.7 V
(IOH = -2.5 mA)
VOL
VOH
''H'' Output Voltage
2.4 V
(IOH = -400
mA)
8 mA maximum
(I/O Cycle = 375 ns)
ICC
Average Operating Current
5 mA maximum
(I/O Cycle = 1
ms)
Parameter
Symbol
MSM82C55A-5
MSM82C55A-2
Address Hold Time for RD Rising
20 ns minimum
0 ns minimum
tRA
RD Pulse Width
300 ns minimum
100 ns minimum
tRR
Difined Data Output Delay Time
From RD Falling
200 ns maximum
120 ns maximum
tRD
Data Floating Delay Time From RD Rising
100 ns maximum
75 ns maximum
tRF
RD/WR Recovery Time
850 ns minimum
200 ns minimum
tRV
相關(guān)PDF資料
PDF描述
MSM82C55A-2VJS 24 I/O, PIA-GENERAL PURPOSE, PQCC44
MSM82C59A-2GS-K 80C85AH; 80C86A; 80C88A COMPATIBLE, INTERRUPT CONTROLLER, PDSO32
MSM82C84A-2GS-K 8 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO24
MSM82C84A-2JS OTHER CLOCK GENERATOR, PQCC20
MSM83C154-XXJS 8-BIT, MROM, 12 MHz, MICROCONTROLLER, PQCC44
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