參數(shù)資料
型號(hào): MSP430F168IRTD
廠商: TEXAS INSTRUMENTS INC
元件分類(lèi): 微控制器/微處理器
英文描述: 16-BIT, FLASH, 8 MHz, RISC MICROCONTROLLER, PQCC64
封裝: PLASTIC, QFN-64
文件頁(yè)數(shù): 20/73頁(yè)
文件大?。?/td> 1442K
代理商: MSP430F168IRTD
MSP430x15x, MSP430x16x, MSP430x161x
MIXED SIGNAL MICROCONTROLLER
SLAS368E OCTOBER 2002 REVISED AUGUST 2006
27
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature (unless otherwise
noted) (continued)
SCHMITT-trigger inputs Ports P1, P2, P3, P4, P5, P6; RST/NMI; JTAG: TCK, TMS, TDI/TCLK, TDO/TDI
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
V
Positive going input threshold voltage
VCC = 2.2 V
1.1
1.5
V
VIT+
Positive-going input threshold voltage
VCC = 3 V
1.5
1.98
V
Negative going input threshold voltage
VCC = 2.2 V
0.4
0.9
V
VIT
Negative-going input threshold voltage
VCC = 3 V
0.9
1.3
V
Input voltage hysteresis (V
V
)
VCC = 2.2 V
0.3
1.1
V
Vhys
Input voltage hysteresis (VIT+ VIT)
VCC = 3 V
0.5
1
V
inputs Px.x, TAx, TBx
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
UNIT
t
External interrupt timing
Port P1, P2: P1.x to P2.x, external trigger signal
2.2 V
62
ns
t(int)
External interrupt timing
Port P1, P2: P1.x to P2.x, external trigger signal
for the interrupt flag, (see Note 1)
3 V
50
ns
Timer A Timer B capture
TA0, TA1, TA2
2.2 V
62
t(cap)
Timer_A, Timer_B capture
timing
TB0, TB1, TB2, TB3, TB4, TB5, TB6
(see Note 2)
3 V
50
ns
f(TAext)
Timer_A, Timer_B clock
frequency externally applied
TACLK TBCLK INCLK: t
=t
2.2 V
8
MHz
f(TBext)
frequency externally applied
to pin
TACLK, TBCLK, INCLK: t(H) = t(L)
3 V
10
MHz
f(TAint)
Timer_A, Timer_B clock
SMCLK or ACLK signal selected
2.2 V
8
MHz
f(TBint)
Timer_A, Timer_B clock
frequency
SMCLK or ACLK signal selected
3 V
10
MHz
NOTES:
1. The external signal sets the interrupt flag every time the minimum t(int) parameters are met. It may be set even with trigger signals
shorter than t(int).
2. Seven capture/compare registers in ’x16x/161x and three capture/compare registers in ’x15x.
leakage current Ports P1, P2, P3, P4, P5 and P6 (see Note 1)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Ilkg(Px.y)
Leakage
current
Port Px
V(Px.y) (see Note 2)
VCC = 2.2 V/3 V
±50
nA
NOTES:
1. The leakage current is measured with VSS or VCC applied to the corresponding pin(s), unless otherwise noted.
2. The port pin must be selected as input.
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