參數(shù)資料
型號(hào)： MSP430F168IRTD
廠商： TEXAS INSTRUMENTS INC
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 8 MHz, RISC MICROCONTROLLER, PQCC64
封裝： PLASTIC, QFN-64
文件頁數(shù)： 31/73頁
文件大?。?/td> 1442K
代理商： MSP430F168IRTD
MSP430x15x, MSP430x16x, MSP430x161x
MIXED SIGNAL MICROCONTROLLER
SLAS368E OCTOBER 2002 REVISED AUGUST 2006
37
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature (unless otherwise
noted) (continued)
main DCO characteristics
D Individual devices have a minimum and maximum operation frequency. The specified parameters for
f(DCOx0) to f(DCOx7) are valid for all devices.
D All ranges selected by Rsel(n) overlap with Rsel(n+1): Rsel0 overlaps Rsel1, ... Rsel6 overlaps Rsel7.
D DCO control bits DCO0, DCO1, and DCO2 have a step size as defined by parameter S
DCO.
D Modulation control bits MOD0 to MOD4 select how often f(
DCO+1) is used within the period of 32 DCOCLK
cycles. The frequency f(DCO) is used for the remaining cycles. The frequency is an average equal to:
faverage
+
32
f
(DCO)
f
(DCO)1)
MOD
f
(DCO))(32*MOD)
f
(DCO)1)
DCO when using ROSC (see Note 1)
PARAMETER
TEST CONDITIONS
VCC
MIN
NOM
MAX
UNIT
f
DCO output frequency
Rsel = 4, DCO = 3, MOD = 0, DCOR = 1,
2.2 V
1.8
±15%
MHz
fDCO, DCO output frequency
Rsel = 4, DCO = 3, MOD = 0, DCOR = 1,
TA = 25°C
3 V
1.95
±15%
MHz
Dt, Temperature drift
Rsel = 4, DCO = 3, MOD = 0, DCOR = 1
2.2 V/3 V
±0.1
%/
°C
Dv, Drift with VCC variation
Rsel = 4, DCO = 3, MOD = 0, DCOR = 1
2.2 V/3 V
10
%/V
NOTES:
1. ROSC = 100kΩ. Metal film resistor, type 0257. 0.6 watt with 1% tolerance and TK = ±50ppm/°C.
crystal oscillator, LFXT1 oscillator (see Note 1)
PARAMETER
TEST CONDITIONS
MIN
NOM
MAX
UNIT
C
Integrated input capacitance
XTS=0; LF oscillator selected, VCC = 2.2 V/3 V
12
pF
CXIN
Integrated input capacitance
XTS=1; XT1 oscillator selected, VCC = 2.2 V/3 V
2
pF
C
Integrated output capacitance
XTS=0; LF oscillator selected, VCC = 2.2 V/3 V
12
pF
CXOUT
Integrated output capacitance
XTS=1; XT1 oscillator selected, VCC = 2.2 V/3 V
2
pF
VIL
I
t l
l
t XIN
VCC = 2.2 V/3 V
(N
2)
XTS = 0 or 1
XT1 or LF modes
VSS
0.2
× VCC
V
Input levels at XIN
CC
(see Note 2)
XTS = 0, LF mode
0.9
× VCC
VCC
V
VIH
XTS = 1, XT1 mode
0.8
× VCC
VCC
NOTES:
1. The oscillator needs capacitors at both terminals, with values specified by the crystal manufacturer.
2. Applies only when using an external logic-level clock source. Not applicable when using a crystal or resonator.
crystal oscillator, XT2 oscillator (see Note 1)
PARAMETER
TEST CONDITIONS
MIN
NOM
MAX
UNIT
CXIN
Integrated input capacitance
VCC = 2.2 V/3 V
2
pF
CXOUT
Integrated output capacitance
VCC = 2.2 V/3 V
2
pF
VIL
Input levels at XIN
V
= 2 2 V/3 V (see Note 2)
VSS
0.2
× VCC
V
VIH
Input levels at XIN
VCC = 2.2 V/3 V (see Note 2)
0.8
× VCC
VCC
V
NOTES:
1. The oscillator needs capacitors at both terminals, with values specified by the crystal manufacturer.
2. Applies only when using an external logic-level clock source. Not applicable when using a crystal or resonator.
USART0, USART1 (see Note 1)
PARAMETER
TEST CONDITIONS
MIN
NOM
MAX
UNIT
t( )
USART0/USART1: deglitch time
VCC = 2.2 V
200
430
800
ns
t(τ)
USART0/USART1: deglitch time
VCC = 3 V
150
280
500
ns
NOTE 1: The signal applied to the USART0/USART1 receive signal/terminal (URXD0/1) should meet the timing requirements of t(τ) to ensure
that the URXS flip-flop is set. The URXS flip-flop is set with negative pulses meeting the minimum-timing condition of t(τ). The operating
conditions to set the flag must be met independently from this timing constraint. The deglitch circuitry is active only on negative
transitions on the URXD0/1 line.
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