參數(shù)資料
型號(hào): MSP430F5132IRSBT
廠商: TEXAS INSTRUMENTS INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, RISC MICROCONTROLLER, PQCC40
封裝: GREEN, PLASTIC, WQFN-40
文件頁數(shù): 30/102頁
文件大?。?/td> 1183K
代理商: MSP430F5132IRSBT
MSP430F51x1
MSP430F51x2
SLAS619A
– AUGUST 2010 – REVISED AUGUST 2011
Recommended Operating Conditions
MIN
NOM
MAX
UNIT
PMMCOREVx = 0
1.8
3.6
V
Supply voltage during program execution and flash
PMMCOREVx = 0, 1
2.0
3.6
V
VCC
programming
PMMCOREVx = 0, 1, 2
2.2
3.6
V
V(AVCC) = V(DVCC) = VCC
(1)
PMMCOREVx = 0, 1, 2, 3
2.4
3.6
V
VIO
Supply voltage of pins P1.6, P1.7, P2.0 to P2.7, P3.0, and P3.1 supplied by VIO(2)
1.8
5.5
V
VSS
Supply voltage V(AVSS) = V(DVSS) = VSS
0
V
TA
Operating free-air temperature
–40
85
°C
TJ
Operating junction temperature
–40
85
°C
C(VCORE) Recommended capacitor at VCORE
470
nF
C(DVCC)/
Capacitor ratio of DVCC to VCORE
10
C(VCORE)
PMMCOREVx = 0,
1.8 V
≤ VCC ≤ 3.6 V
0
12
(default condition)
PMMCOREVx = 1,
0
16
Processor frequency (maximum MCLK frequency)(3) (4)
2.0 V
≤ VCC ≤ 3.6 V
fSYSTEM
MHz
(see Figure 1)
PMMCOREVx = 2,
0
20
2.2 V
≤ VCC ≤ 3.6 V
PMMCOREVx = 3,
0
25
2.2 V
≤ VCC ≤ 3.6 V
PINT
Internal power dissipation
VCC x I(DVCC)
W
(VCC - VIOH) x IIOH +
PIO
I/O power dissipation of the I/O pins powered by DVCC
W
VIOL x IIOL
(VIO - VIOH5) x IIOH5 +
PIO5
I/O power dissipation of the I/O pins powered by VIO
W
VIOL5 x IIOL5
PMAX
Maximum allowed power dissipation, PMAX > PIO + PIO5 + PINT
(TJ - TA)/θJA
W
(1)
It is recommended to power AVCC and DVCC from the same source. A maximum difference of 0.3 V between V(AVCC) and V(DVCC)
can be tolerated during power up and operation.
(2)
It is recommended to power DVCC and AVCC prior to DVIO. At DVCC/AVCC voltages higher than 1.8 V, the maximum difference of
0.3 V between DVIO and DVCC/AVCC can be exceeded.
(3)
The MSP430 CPU is clocked directly with MCLK. Both the high and low phase of MCLK must not exceed the pulse width of the
specified maximum frequency.
(4)
Modules may have a different maximum input clock specification. See the specification of the respective module in this data sheet.
Copyright
2010–2011, Texas Instruments Incorporated
33
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