參數(shù)資料
型號: MSP430F5508IPT
廠商: TEXAS INSTRUMENTS INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 25 MHz, RISC MICROCONTROLLER, PQCC48
封裝: PLASTIC, VQFN-48
文件頁數(shù): 39/99頁
文件大?。?/td> 1134K
代理商: MSP430F5508IPT
PRODUCTPREVIEW
MSP430F550x
SLAS645B – JULY 2009 – REVISED JULY 2010
www.ti.com
Absolute Maximum Ratings
(1)
over operating free-air temperature range (unless otherwise noted)
Voltage applied at VCC to VSS
–0.3 V to 4.1 V
Voltage applied to any pin (excluding VCORE, VBUS, V18)(2)
–0.3 V to VCC + 0.3 V
Diode current at any device pin
±2 mA
Storage temperature range, Tstg
(3)
–55°C to 105°C
Maximum junction temperature, TJ
95°C
(1)
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
All voltages referenced to VSS. VCORE is for internal device usage only. No external DC loading or voltage should be applied.
(3)
Higher temperature may be applied during board soldering according to the current JEDEC J-STD-020 specification with peak reflow
temperatures not higher than classified on the device label on the shipping boxes or reels.
Thermal Packaging Characteristics
PARAMETER
VALUE
UNIT
QFN (RGC)
55
QFN (RGZ)
TBD
Low-K board (JESD51-3)
QFP (PT)
TBD
BGA (ZQE)
TBD
qJA
Junction-to-ambient thermal resistance, still air
°C/W
QFN (RGC)
25
QFN (RGZ)
TBD
High-K board (JESD51-7)
QFP (PT)
TBD
BGA (ZQE)
TBD
QFP (RGC)
TBD
QFN (RGZ)
TBD
qJC
Junction-to-case thermal resistance
°C/W
QFP (PT)
TBD
BGA (ZQE)
TBD
QFP (RGC)
TBD
QFN (RGZ)
TBD
qJB
Junction-to-board thermal resistance
°C/W
QFP (PT)
TBD
BGA (ZQE)
TBD
Recommended Operating Conditions
MIN
NOM
MAX
UNIT
PMMCOREVx = 0
1.8
3.6
V
PMMCOREVx = 0, 1
2.0
3.6
V
Supply voltage during program execution and flash
VCC
programming(AVCC = DVCC1/2 = DVCC)
(1)
PMMCOREVx = 0, 1, 2
2.2
3.6
V
PMMCOREVx = 0, 1, 2, 3
2.4
3.6
V
PMMCOREVx = 0
1.8
3.6
V
PMMCOREVx = 0, 1
2.0
3.6
V
Supply voltage during USB operation, USB PLL disabled
USB_EN = 1, UPLLEN = 0
PMMCOREVx = 0, 1, 2
2.2
3.6
V
VCC,USB
PMMCOREVx = 0, 1, 2, 3
2.4
3.6
V
PMMCOREVx = 2
2.2
3.6
V
Supply voltage during USB operation, USB PLL enabled(2)
USB_EN = 1, UPLLEN = 1
PMMCOREVx = 2, 3
2.4
3.6
V
VSS
Supply voltage (AVSS = DVSS1/2 = DVSS)
0
V
TA
Operating free-air temperature
I version
–40
85
°C
TJ
Operating junction temperature
I version
-40
85
°C
CVCORE
Capacitor at VCORE
470
nF
(1)
It is recommended to power AVCC and DVCC from the same source. A maximum difference of 0.3 V between AVCC and DVCC can be
tolerated during power up and operation.
(2)
USB operation with USB PLL enabled requires PMMCOREVx
≥ 2 for proper operation.
44
Copyright 2009–2010, Texas Instruments Incorporated
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