參數(shù)資料
型號： MSP430F5632IZQWR
廠商： TEXAS INSTRUMENTS INC
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 20 MHz, RISC MICROCONTROLLER, PBGA113
封裝： GREEN, PLASTIC, BGA-113
文件頁數(shù)： 55/101頁
文件大?。?/td> 1073K
代理商： MSP430F5632IZQWR
PRODUCTPREVIEW
SDA
SCL
t
HD,DAT
t
SU,DAT
t
HD,STA
t
HIGH
t
LOW
t
BUF
t
HD,STA
t
SU,STA
t
SP
t
SU,STO
MSP430F563x
www.ti.com
SLAS650A – JUNE 2010 – REVISED JULY 2010
USCI (I2C Mode) (continued)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 7)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
UNIT
tHD,DAT
Data hold time
2.2 V/3 V
0
ns
tSU,DAT
Data setup time
2.2 V/3 V
250
ns
fSCL ≤ 100 kHz
4.0
tSU,STO
Setup time for STOP
2.2 V/3 V
s
fSCL > 100 kHz
0.6
2.2 V
50
600
tSP
Pulse width of spikes suppressed by input filter
ns
3 V
50
600
Figure 7. I2C Mode Timing
12-Bit ADC, Power Supply and Input Range Conditions
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
(1)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
UNIT
AVCC and DVCC are connected together,
AVCC
Analog supply voltage
AVSS and DVSS are connected together,
2.2
3.6
V
V(AVSS) = V(DVSS) = 0 V
V(Ax)
Analog input voltage range(2)
All ADC12 analog input pins Ax
0
AVCC
V
fADC12CLK = 5.0 MHz, ADC12ON = 1,
2.2 v
125
155
Operating supply current into
IADC12_A
REFON = 0, SHT0 = 0, SHT1 = 0, ADC12DIV
A
AVCC terminal
(3)
3 V
150
220
= 0
Only one terminal Ax can be selected at one
CI
Input capacitance
2.2 V
20
25
pF
time
RI
Input MUX ON resistance
0 V
≤ VAx ≤ AVCC
10
200
1900
(1)
The leakage current is specified by the digital I/O input leakage.
(2)
The analog input voltage range must be within the selected reference voltage range VR+ to VR– for valid conversion results. If the
reference voltage is supplied by an external source or if the internal voltage is used and REFOUT = 1, then decoupling capacitors are
(3)
The internal reference supply current is not included in current consumption parameter IADC12.
12-Bit ADC, Timing Parameters
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
UNIT
For specified performance of ADC12 linearity
fADC12CLK
2.2 V/3 V
0.45
4.8
5.4
MHz
parameters
Internal ADC12
fADC12OSC
ADC12DIV = 0, fADC12CLK = fADC12OSC
2.2 V/3 V
4.2
4.8
5.4
MHz
oscillator(1)
(1)
The ADC12OSC is sourced directly from MODOSC inside the UCS. At supply voltages below 2.2 V the ADC12OSC clock needs to be
divided by 2.
Copyright 2010, Texas Instruments Incorporated
57
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