參數(shù)資料
型號(hào)： MT5TL8L32T-40IT
元件分類(lèi)： 微控制器/微處理器
英文描述： SPECIALTY MICROPROCESSOR CIRCUIT, PQFP100
封裝： TQFP-100
文件頁(yè)數(shù)： 19/31頁(yè)
文件大?。?/td> 584K
代理商： MT5TL8L32T-40IT
MUAC Routing Coprocessor
2002, Micron Technology Inc.
DS-MUAC RCP 8K and 4K.fm - Rev March/13/02/ 02:20 PM
26
ADVANCE
Melody Routing Coprocessor
1
-1.0V for a duration of 10ns measured from the 50 percent amplitude points (see Figure 5 on page 25) for input-only
lines
2
Common I/O lines are clamped so that transients cannot fall below -0.5V
3
Applies to all cycle types except Compare cycles and Memory Read cycles (memory to DQ)
4
Applies to Compare cycles (including NEXT)
5
Control signals are CS#1, CS#2, W#, AV#, DSC, and the AC bus
6
With loads specified in Figure 4 on page 25, Test load A from Table 8
7
With loads specified in Figure 4 on page 25, Test load B from Table 8
8
E# should be HIGH during RESET# active to ensure proper device defaults
9
Test inputs are the TDI and TMS signals
10 With output and I/O pins unloaded
11 Pins with internal pull-ups are RESET#, TCLK, TMS, TDI, and TRST#
Table 9: Switching Characteristics
-35
-40
-50
-70
-90
-12
NO PARAMETER (ALL TIMES IN NANOSECONDS)
SYMBOL
MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX NOTES
1a Chip Enable Cycle Time (Other Cycles)
tELEL
40
50
75
3
1b
Chip Enable Cycle Time (Compare Cycle)
tELEL
35
40
50
70
90
120
4
2a
Chip Enable LOW Pulse Width (Other Cycles)
tELEH
30
40
55
3
2b
Chip Enable LOW Pulse Width (Compare Cycle) tELEH
25
30
40
60
75
90
4
3
Chip Enable HIGH Pulse Width
tEHEL
910
10
4
Control Input to Chip Enable LOW Setup Time tCVEL
5
558
10
5
Control Input to Chip Enable LOW Hold Time
tELCX
4
444
5
6
Chip Enable LOW to Outputs Active
tELQX
5
555
5
6
7
Chip Enable LOW to Outputs Valid
Register tELQV
30
35
40
50
6
Memory
35
40
50
70
80
6
8
Chip Enable HIGH to Outputs High-Z
tEHQZ
2
10
2
10
210210
2
10
2
15
7
9
Data to Chip Enable LOW Setup Time
tDVEL
4
444
5
6
10 Data from Chip Enable LOW Hold
Time
Commercial tELDX
4
444
5
Industrial
n/a
5
11
Full In Valid to Chip Enable LOW Setup Time
tFIVEL
0
000
3
12 Full In Valid to Full Flag Valid
tFIVFFV
5
6
889
12
13
Chip Enable HIGH to Full Flag Valid
tEHFFV
15
16
25
14
Chip Enable HIGH to Output Change
tEHQX
2
222
2
15
Chip Enable HIGH to Output Valid
tEHQV
15
18
22
25
30
16
Match In Valid to Chip Enable LOW Setup
tMIVEL
46
8
10
12
17 Chip Enable HIGH to Match Flag Change
tEHMX
2
222
2
18
Chip Enable HIGH to Match Flag
Valid
MF# tEHMV
12
14
15
17
20
25
MM#
15
17
20
25
19 Chip Enable LOW to Match Flag Valid
tELMV
42
50
60
n/a
20
Match In Valid to Match Flag Valid
MF# tMIVMV
5
6
889
12
MM#
7
889
12
21
Output Enable HIGH to Outputs High-Z
tOEHQZ
2
10
2
10
210210
2
10
2
15
22
Output Enable LOW to Match Address
Outputs Valid
tOELQV
810
12
14
16
23 Match in Valid to Output Enable LOW
tMIVOEL
3
333
4
24
Full in Valid to Output Enable LOW
tFIVOEL
3
333
4
25
Chip Enable HIGH to Reset LOW
tEHRSTL
10
15
20
25
26
Reset Pulse Width
tRSTLRSTH
25
30
50
70
8
27
Reset HIGH to Chip Enable LOW
tRSTHEL
10
15
20
25
28 Test Input Valid to TCLK HIGH Setup Time
tTIVTCLKH
20
25
9
29
TCLK HIGH to Test Input Hold Time
tTCLKHTIX
20
25
9
30
TCLK LOW to TDO Change
tTCLKLTDOX
2
10
2
10
210210
2
10
2
15
31
TCLK LOW to TDO Valid
tTCLKLTDOV
20
25
32 TCLK LOW to TDO High-Z
tTCLKLTDOZ 20
20
25
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