參數(shù)資料
型號(hào)： MT5TL8L32T-40IT
元件分類(lèi)： 微控制器/微處理器
英文描述： SPECIALTY MICROPROCESSOR CIRCUIT, PQFP100
封裝： TQFP-100
文件頁(yè)數(shù)： 7/31頁(yè)
文件大小： 584K
代理商： MT5TL8L32T-40IT
MUAC Routing Coprocessor
2002, Micron Technology Inc.
DS-MUAC RCP 8K and 4K.fm - Rev March/13/02/ 02:20 PM
15
ADVANCE
Melody Routing Coprocessor
CONTROL STATE OVERVIEW
Table 2: Control State Overview
AC BUS
W# = LOW
PA:AA
SCOPE
W# = HIGH
PA:AA
SCOPE
Register Read/Write
(32-bit operations)
xxx xxx 000 011
NOP
n/c
n/a
RD NFA
n/c
NFD
xxx nnn 000 100
WR AR {MRnnn}
n/c
AS
RD AR
n/c
S
xxx nnn 000 110
WR FR {MRnnn}
n/c
AS
RD FR
n/c
S
xxx nnn 001 000
WR DS {MRnnn}
n/c
AS
RD DS
n/c
S
xxx xxx 000 111
RESERVED
n/c
n/a
RD SR
n/c
HPD/S
xxx nnn 000 101
WRs CR {MRnnn}
n/c
AS
RDs CR
n/c
S
xxx nnn 001 001
WRs MRnnn
n/c
AS
RDs MR nnn
n/c
S
Memory Read/Write
(32-bit operations)
A(12:0)/ A(11:0) [AV# = LOW]
WRs aaa
aaa
AS
RDs aaa
aaa
S
xxx nnn 000 000
WRs [AR] {MRnnn}
aaa
AS
RDs [AR]
aaa
S
xxx nnn 100 110
WRs [AR]+ {MRnnn}
aaa
AS
RDs [AR]+
aaa
S
xxx nnn 100 111
WRs [AR]- {MRnnn}
aaa
AS
RDs [AR]-
aaa
S
xxx nnn 000 010
WRs [HPM] {MRnnn}
HPMA
HPD
RDs [HPM]
HPMA
HPD
xxx nnn 000 001
WRs [NFA] {MRnnn}
NFA
NFD
RDs [HPM]; NEXT
HPMA
HPD
Data Move
(64-bit operations)
xxx nnn 001 100
MOV [AR],CR {MRnnn}
aaa
AS
MOV CR, [AR] {MRnnn}
aaa
AS
xxx nnn 001 101
MOV [NFA],CR {MRnnn}
NFA
NFD
RESERVED
n/c
AS
xxx nnn 001 110
MOV [HPM],CR {MRnnn}
HPMA
HPD
MOV CR,[HPM] {MRnnn}
HPMA
HPD
Comparison
(64-bit operations)
xxx nnn 011 000
CMP CR {MRnnn}
HPMA
AS
RESERVED
n/c
n/a
xxx nnn 011 001
CMPs DQ {MRnnn}
HPMA
AS
RESERVED
n/c
n/a
xxx nnn 011 010
CMPWs DQ {MRnnn}
HPMA
AS
RESERVED
n/c
n/a
xxx xxx 011 100
CMPT DQ
HPMA
HPD
RESERVED
n/c
n/a
xxx xxx 011 011
NEXT
HPMA
HPD
RESERVED
n/c
n/a
Validity Bit Control
xxx xxx 100 000
SET V@[AR]
aaa
AS
RD V@[AR]
aaa
S
xxx xxx 100 001
RST V@[AR]
aaa
AS
RESERVED
n/c
n/a
xxx xxx 100 010
RST V@[HPM]
HPMA
HPS
RESERVED
n/c
n/a
xxx xxx 100 011
RST V@AML
HPMA
AS
RESERVED
n/c
n/a
Initialization
xxx xxx 111 100
WR PA
n/c
NFD
RESERVED
n/c
n/a
xxx xxx 111 101
RST FF
n/c
AS
RESERVED
n/c
n/a
xxx xxx 111 111
RST
All 1s
AS
RESERVED
n/c
n/a
Address Register Control
xxx xxx 100 100
INC AR
n/c
AS
RESERVED
n/c
n/a
xxx xxx 100 101
DEC AR
n/c
AS
RESERVED
n/c
n/a
KEY:
aaa = Random access address
n/c = No change
All 1s = All PA:AA outputs HIGH
NFA = Next Free address
AS = All selected devices
NFD = Highest-Priority device with a Free location
HPD = Highest-Priority device
s = Segment (L for DSC LOW, H for DSC HIGH)
HPMA = Highest-Priority Match address
S = Selected device
n/a = Not applicable
The “Scope” of a control state describes which devices respond in a multi-CAM system.
The “PA:AA” field describes what is output on the PA3–0:AA11–0 bus as a result of the control state.
AV# is HIGH unless otherwise noted.
DSC must be LOW when “s” is not indicated.
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