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MT9122
Preliminary Information
8-36
Power Reset Value
48h
7
6
5
4
3
2
1
0
DTDT
15
DTDT
14
DTDT
13
DTDT
12
DTDT
10
DTDT
9
DTDT
8
DTDT
11
Echo Canceller A, Double-Talk Detection Threshold Register 2
Echo Canceller B, Double-Talk Detection Threshold Register 2
ADDRESS = 15h WRITE/READ VERIFY
ADDRESS = 35h WRITE/READ VERIFY
Power Reset Value
00h
7
6
5
4
3
2
1
0
DTDT
7
DTDT
6
DTDT
5
DTDT
4
DTDT
2
DTDT
1
DTDT
0
DTDT
3
Echo Canceller A, Double-Talk Detection Threshold Register 1
Echo Canceller B, Double-Talk Detection Threshold Register 1
ADDRESS = 14h WRITE/READ VERIFY
ADDRESS = 34h WRITE/READ VERIFY
This register allows the user to program the level of Double-Talk Detection Threshold (DTDT). The 16 bit 2’s complement linear
value
defaults
to 4800h= 0.5625 or -5dB. The maximum value is 7FFFh = 0.9999 or 0 dB. The high byte is in Register 2 and
the low byte is in Register 1.
DTDT
DTDT
Power Reset Value
08h
7
6
5
4
3
2
1
0
NLP
15
NLP
14
NLP
13
NLP
12
NLP
10
NLP
9
NLP
8
NLP
11
Echo Canceller A, Non-Linear Processor Threshold Register 2
Echo Canceller B, Non-Linear Processor Threshold Register 2
ADDRESS = 19h WRITE/READ VERIFY
ADDRESS = 39h WRITE/READ VERIFY
Power Reset Value
00h
7
6
5
4
3
2
1
0
NLP
7
NLP
6
NLP
5
NLP
4
NLP
2
NLP
1
NLP
0
NLP
3
Echo Canceller A, Non-Linear Processor Threshold Register 1
Echo Canceller B, Non-Linear Processor Threshold Register 1
ADDRESS = 18h WRITE/READ VERIFY
ADDRESS = 38h WRITE/READ VERIFY
This register allows the user to program the level of the Non-Linear Processor Threshold (NLPTHR). The 16 bit 2’s complement
linear value
defaults
to 0800h = 0.0625 or -24.1dB. The maximum value is 7FFFh = 0.9999 or 0 dB. The high byte is in
Register 2 and the low byte is in Register 1.
NLPTHR
NLPTHR
Power Reset Value
40h
7
6
5
4
3
2
1
0
MU
15
MU
14
MU
13
MU
12
MU
10
MU
9
MU
8
MU
11
Echo Canceller A, Adaptation Step Size (MU) Register 2
Echo Canceller B, Adaptation Step Size (MU) Register 2
ADDRESS = 1Bh WRITE/READ VERIFY
ADDRESS = 3Bh WRITE/READ VERIFY
Power Reset Value
00h
7
6
5
4
3
2
1
0
MU
7
MU
6
MU
5
MU
4
MU
2
MU
1
MU
0
MU
3
Echo Canceller A, Adaptation Step Size (MU) Register 1
Echo Canceller B, Adaptation Step Size (MU) Register 1
ADDRESS = 1Ah WRITE/READ VERIFY
ADDRESS = 3Ah WRITE/READ VERIFY
This register allows the user to program the level of MU. MU is a 16 bit 2’s complement value which defaults to 4000h = 1.0
The high byte is in Register 2 and the low byte is in Register 1.
MU
MU