參數(shù)資料
型號： MULTILYNX
英文描述： MultiLynx CL2151 Universal HFC? Interactive Cable Transceiver
中文描述： MultiLynx CL2151通用光纖？交互式有線電視收發(fā)器
文件頁數(shù)： 20/52頁
文件大?。?/td> 517K
代理商： MULTILYNX
20
MON08 Multilink User Manual
P&E
Microcomputer
Systems, Inc.
MON08 MULTILINK
3.15
68HC908JG
Figure 3-15: 68HC908JG Family MON08 Pinout
The target GND is connected to the Pin 2 of the target MON08 Header.
The target RESET line is directly connected to the Pin 4 of the target MON08
Header.
Alternatively, the user may pull up the RESET line to target VDD. In which
case the user does not need to connect this signal to the target MON08 Header.
The target IRQ line is directly connected to the Pin 6 of the target MON08
Header.
PORTA0 from the target processor is connected to the target MON08 Header
Pin 10, acting as the communications line. The MON08 MULTILINK pulls up
this signal with a 10K Ohm resistor to the target VDD.
PORTA1, PORTA2, PORTA3 and PORTE3 are used for entering monitor
mode. By default the user may directly bring these signals out to the target
MON08 Header.
Alternatively, the user may pull up PORTA1 and PORTE3, pull down
PORTA2, and pull up/down PORTA3 for clock division. In which case the user
does not need to connect these signals to the target MON08 Header.
3.16
68HC908JK
Figure 3-16: 68HC908JK Family MON08 Pinout
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