參數(shù)資料
型號(hào): MVTX2603AG
廠商: ZARLINK SEMICONDUCTOR INC
元件分類: 網(wǎng)絡(luò)接口
英文描述: Unmanaged 24-Port 10/100 Mb + 2-Port 1 Gb Ethernet Switch
中文描述: DATACOM, LAN SWITCHING CIRCUIT, PBGA553
封裝: 37.50 X 37.50 MM, 2.33 MM HEIGHT, MS-034, HSBGA-553
文件頁數(shù): 41/109頁
文件大?。?/td> 803K
代理商: MVTX2603AG
MVTX2603
Data Sheet
41
Zarlink Semiconductor Inc.
WLPP54
Well known Logic Port Priority for 5
and 4
597
R/W
0ED
000
WLPP76
Well-known Logic Port Priority for 7 & 6
598
R/W
0EE
000
WLPE
Well known Logic Port Enable
599
R/W
0EF
000
RLOWL
User Define Range Low Bit7:0
59A
R/W
0F4
000
RLOWH
User Define Range Low Bit 15:8
59B
R/W
0F5
000
RHIGHL
User Define Range High Bit 7:0
59C
R/W
0D3
000
RHIGHH
User Define Range High Bit 15:8
59D
R/W
0D4
000
RPRIORITY
User Define Range Priority
59E
R/W
0D5
000
5. MISC Configuration Registers
MII_OP0
MII Register Option 0
600
R/W
0F0
000
MII_OP1
MII Register Option 1
601
R/W
0F1
000
FEN
Feature Registers
602
R/W
0F2
010
MIIC0
MII Command Register 0
603
R/W
N/A
000
MIIC1
MII Command Register 1
604
R/W
N/A
000
MIIC2
MII Command Register 2
605
R/W
N/A
000
MIIC3
MII Command Register 3
606
R/W
N/A
000
MIID0
MII Data Register 0
607
RO
N/A
N/A
MIID1
MII Data Register 1
608
RO
N/A
N/A
LED
LED Control Register
609
R/W
0F3
000
SUM
EEPROM Checksum Register
60B
R/W
0FF
000
6. Port Mirroring Controls
MIRROR1_SRC
Port Mirror 1 Source Port
700
R/W
N/A
07F
MIRROR1_ DEST
Port Mirror 1 Destination Port
701
R/W
N/A
017
MIRROR2_SRC
Port Mirror 2 Source Port
702
R/W
N/A
0FF
MIRROR2_ DEST
Port Mirror 2 Destination Port
703
R/W
N/A
000
F. Device Configuration Register
GCR
Global Control Register
F00
R/W
N/A
000
DCR
Device Status and Signature Register
F01
RO
N/A
N/A
DCR1
Giga Port status
F02
RO
N/A
N/A
DPST
Device Port Status Register
F03
R/W
N/A
000
DTST
Data read back register
F04
RO
N/A
N/A
DA
DA Register
FFF
RO
N/A
DA
Register
Description
CPU Addr
(Hex)
R/W
I
2
C Addr
(Hex)
Default
Notes
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