參數(shù)資料
型號: MVTX2603AG
廠商: ZARLINK SEMICONDUCTOR INC
元件分類: 網(wǎng)絡(luò)接口
英文描述: Unmanaged 24-Port 10/100 Mb + 2-Port 1 Gb Ethernet Switch
中文描述: DATACOM, LAN SWITCHING CIRCUIT, PBGA553
封裝: 37.50 X 37.50 MM, 2.33 MM HEIGHT, MS-034, HSBGA-553
文件頁數(shù): 43/109頁
文件大小: 803K
代理商: MVTX2603AG
MVTX2603
Data Sheet
43
Zarlink Semiconductor Inc.
13.2.2 ECR2Pn: Port N Control Register
I
2
C Address: h01B-035; CPU Address: h0001+2xN
Accessed by and serial interface and I
2
C (R/W)
13.2.3 GGControl – Extra GIGA Port Control
CPU Address: h036
Accessed by serial interface (R/W)
7
6
5
4
3
2
1
0
QoS Sel
Reserve
DisL
Ftf
Futf
Bit [0]:
Filter untagged frame
(Default 0)
0: Disable
1: All untagged frames from this port are discarded
Bit [1]:
Filter Tag frame
(Default 0)
0: Disable
1: All tagged frames from this port are discarded
Bit [2]:
Learning Disable
(Default 0)
1 Learning is disabled on this port
0 Learning is enabled on this port
Bit [3]:
Must be set to ‘1’
Bit [5:4:]
QOS mode selection (Default 00)
Determines which of the 4 sets of QoS settings is used for 10/100 ports.
Note that there are 4 sets of per-queue byte thresholds, and 4 sets of WFQ
ratios programmed. These bits select among the 4 choices for each 10/100
port. Refer to QoS Application Note.
00: select class byte limit set 0 and classes WFQ credit set 0
01: select class byte limit set 1 and classes WFQ credit set 1
10: select class byte limit set 2 and classes WFQ credit set 2
11: select class byte limit set 3 and classes WFQ credit set 3
Bit [7:6]
Reserved
7
6
5
4
3
2
1
0
DF
MiiB
RstA
DF
MiiA
RstA
Bit [0]:
Reset GIGA port A
0: Normal operation (default)
1: Reset Gigabit port A
Bit [1]:
GIGA port A use MII interface (10/100 M)
0: Gigabit port operations at 1000 mode
1: Gigabit port operations at 10/100 mode
Bit [2]:
Reserved - Must be zero
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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