參數(shù)資料
型號: MVTX2802AG
廠商: ZARLINK SEMICONDUCTOR INC
元件分類: 網(wǎng)絡(luò)接口
英文描述: Managed 4-Port 1000 Mbps Ethernet Switch
中文描述: DATACOM, LAN SWITCHING CIRCUIT, PBGA596
封裝: 40 X 40 MM, 2.33 MM HEIGHT, MS-034, HSBGA-596
文件頁數(shù): 98/154頁
文件大?。?/td> 1936K
代理商: MVTX2802AG
MVTX2802
Data Sheet
98
Zarlink Semiconductor Inc.
11.9.19 RDRC0 – WRED Rate Control 0
I
2
C Address h085, CPU Address h59A
Accessed by CPU, Serial Interface and I
2
C (R/W)
11.9.20 RDRC1 – WRED Rate Control 1
I
2
C Address h086, CPU Address h59B
Accessed by CPU, Serial Interface and I
2
C (R/W)
11.10 Group 6 Address
11.10.1 MISC Group
11.10.1.1 MII_OP0 – MII Register Option 0
I
2
C Address h0B1, CPU Address:h600
Accessed by CPU, serial interface and I
2
C (R/W)
7
4
3
0
X Rate
Y Rate
Bits [7:4]:
Corresponds to the percentage X% in Chapter 7. Used for random
early drop. Granularity 6.25%.
(Default: 4’h8)
Bits[3:0]:
Corresponds to the percentage Y% in Chapter 7. Used for random
early drop. Granularity 6.25%.
(Default: 4’hE)
7
4
3
0
Z Rate
B Rate
Bits [7:4]:
Corresponds to the percentage Z% in Chapter 7. Used for random early drop. Granularity
6.25%.%.
(Default: 4’h6)
Bits[3:0]:
Corresponds to the best effort frame drop percentage B%, when shared pool is all in use
and destination port best effort queue reaches UCC. Used for random early drop.
Granularity 6.25%.%.
(Default: 4’h8)
7
6
5
4
0
Hfc
1prst
NP
Vendor Spc. Reg Addr
Bit [7]:
Half duplex flow control (Do not use half duplex mode)
0 = Half duplex flow control always enable
1 = Half duplex flow control by negotiation
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參數(shù)描述
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MVTX2803AG2 制造商:Microsemi Corporation 功能描述:
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