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參數(shù)資料
| 型號(hào)： | MVTX2804 |
| 廠商： | Zarlink Semiconductor Inc. |
| 英文描述： | 8-Port 1000 Mbps Ethernet Distributed Switch |
| 中文描述： | 8端口1000 Mbps以太網(wǎng)交換機(jī)分布式 |
| 文件頁(yè)數(shù)： | 24/174頁(yè) |
| 文件大小： | 2249K |
| 代理商： | MVTX2804 |
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MVTX2804
Data Sheet
24
Zarlink Semiconductor Inc.
4.0 Memory Interface
4.1 Overview
The figure below illustrates the first part of the ZBT-SRAM interface for the MVTX2804. As shown, two
ZBT-SRAM banks A and B are used, with a 64-bit bus connected to each. Each DMA can read and write from
both bank A and bank B. During each tick, two memory operations will take place in parallel - one for bank A,
and one for bank B. Because the clock frequency is 133 MHz, the total memory bandwidth is 128 bits
133 MHz = 17 Gbps, for frame data buffer (FDB) access.
In addition, the figure shows that the 8 Gigabit ports are actually grouped into sets of 4. If TxDMA 0 is using
bank B during a given memory slot, then TxDMA's 1-3 will never be using bank A during this same slot. As a
result, TxDMA's 0-3 can share the same bank selector.
Not shown in the figure are the CPU port RxDMA's and TxDMA's, each separately connected to its own bank
selector.
Figure 4 - MVTX2804 SRAM Interface Block Diagram (DMAs for Gigaport Ports)
4.2 Detailed Memory Information
Because the bus for each bank is 64 bits wide, frames are broken into 8-byte granules, written to and read from
memory. The first 8-byte granule gets written to Bank A, the second 8-byte granule gets written to Bank B, and
so on in alternating fashion. When reading frames from memory, the same procedure is followed, first from A,
then from B, and so on.
The reading and writing from alternating memory banks can be performed with minimal waste of memory
bandwidth. What's the worst case For any speed port, in the worst case, a 1-byte-long EOF granule gets
written to Bank A. This means that a 7-byte segment of Bank A bandwidth is idle, and furthermore, the next
8-byte segment of Bank B bandwidth is idle, because the first 8 bytes of the next frame will be written to Bank A,
not B. This scenario results in a maximum 15 bytes of waste per frame, which is always acceptable because the
interframe gap is 20 bytes.
The CPU management port gets treated like any other port, reading and writing to alternating memory banks
starting with Bank A. Search engine data is written to both banks in parallel. In this way, a search engine read
operation could be performed by either bank at any time without a problem.
ZBT-SRAM Bank A
ZBT-SRAM Bank B
0-1
TxDMA
2-3
TxDMA
4-5
TxDMA
6-7
TxDMA
0-1
RxDMA
2-3
RxDMA
4-5
RxDMA
6-7
RxDMA
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| MVTX2804AG | 8-Port 1000 Mbps Ethernet Distributed Switch |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MVTX2804AG | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:8-Port 1000 Mbps Ethernet Distributed Switch |
| MVTX2804AG2 | 制造商:Microsemi Corporation 功能描述: |
| MVU10-10FBK | 功能描述:端子 D-10-1103K BS-33-10-P 85299 RoHS:否 制造商:AVX 產(chǎn)品:Junction Box - Wire to Wire 系列:9826 線規(guī):26-18 接線柱/接頭大小: 絕緣: 顏色:Red 型式:Female 觸點(diǎn)電鍍:Tin over Nickel 觸點(diǎn)材料:Beryllium Copper, Phosphor Bronze 端接類(lèi)型:Crimp |
| MVU10-10FBX | 功能描述:端子 BLOCK FORK VNYL INS BTL BS-33-10-P RoHS:否 制造商:AVX 產(chǎn)品:Junction Box - Wire to Wire 系列:9826 線規(guī):26-18 接線柱/接頭大小: 絕緣: 顏色:Red 型式:Female 觸點(diǎn)電鍍:Tin over Nickel 觸點(diǎn)材料:Beryllium Copper, Phosphor Bronze 端接類(lèi)型:Crimp |
| MVU10-10FBX-BOTTLE | 功能描述:CONN FORK BLOCK INSUL 50PC RoHS:是 類(lèi)別:連接器，互連式 >> 端子 - 鏟形 系列:Scotchlok™ 標(biāo)準(zhǔn)包裝:1 系列:Scotchlok™ 端子類(lèi)型:彈簧，壓接式 接線柱/接片尺寸:10 接線柱 寬度 - 外邊:0.320"（8.13mm） 長(zhǎng)度 - 總體:1.030"（26.16mm） 安裝類(lèi)型:自由懸掛 端子:壓接 線規(guī):10-12 AWG 絕緣體:絕緣 特點(diǎn):- 顏色:黃 包裝:散裝 觸點(diǎn)表面涂層:錫 觸點(diǎn)材料:銅，ETP 絕緣體直徑:0.250"（6.35mm） 材料 - 絕緣體:聚酰胺（PA），尼龍 長(zhǎng)度 - 環(huán)心道末端:0.280"（7.11mm） 長(zhǎng)度 - 末端:0.550"（13.97mm） 內(nèi)部舌簧打開(kāi):- 相關(guān)產(chǎn)品:TR-490-ND - HAND CRIMP TOOL RACHET 10-22 AWGTH-450-ND - TOOL HAND CRIMP 6-26AWGTR-482-ND - TOOL RATCHETING 10-22AWG CRIMP920099-R-ND - TOOL 10-22AWG SCOTCHLOK CRIMP 其它名稱:000511285879115112858791180611464373 |
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