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參數(shù)資料
| 型號： | MX98905BFC |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | The MX98905 is designed for easy implementation of CSMA/CD local area networks, |
| 中文描述： | 該MX98905是專為易于實(shí)現(xiàn)的多址/光盤局域網(wǎng)， |
| 文件頁數(shù)： | 54/86頁 |
| 文件大?。?/td> | 352K |
| 代理商： | MX98905BFC |
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54
P/N: PM0365
REV. 1.3, NOV 20 ,1995
MX98905B
8. DATA CONFIGURATION REGISTER (DCR) 0EH
(WRITE)
This register is used to program the ENC for 8- or 16-bit
memory interface, select normal or loopback operation,
select byte ordering in 16-bit application, and establish
FIFO threshold. The DCR must be initialized prior to
loading the Remote Byte Count Registers. LAS is set on
power-up.
WTS
BOS
LAS
LS
ARM
FT0
FT1
0
1
2
3
4
5
6
7
x
Bits
SYMBOL
BIT
DESCRIPTION
WTS
D0
WORD TRANSFER SELECT
0: Selects byte-wide DMA transfers
1: Selects word-wide DMA transfers
WTS establishes byte or word transfer for both Remote and Local DMA transfers.
Note: When word-wide mode is selected, up to 32K words are addressable; A0
remains low.
BOS
D1
BYTE ORDER SELECT
0: MS byte placed on AD15-AD8 and LS byte on AD7-AD0 (32000, 8086)
1: MS byte placed on AD7-AD0 and LS byte on AD15-AD8 (68000); ignored when
WTS is low.
LAS
D2
LONG ADDRESS SELECT
0: Dual 16-bit DMA mode
1: Single 32-bit DMA mode
When LAS is high, the contents of the Remote DMA Registers RSAR0, 1 are issued
as A16-A31. Power-up high.
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