NCN8025 / NCN8025A
http://onsemi.com
7
HOST INTERFACE SECTION CLKIN, RSTIN, I/Ouc, AUX1uc, AUX2uc, CLKDIV1, CLKDIV2, CMDVCC, VSEL0, VSEL1 (VDD =
3.3 V; VDDP = 5 V; Tamb = 25°C; FCLKIN = 10 MHz)
Symbol
Rating
Min
Typ
Max
Unit
FCLKIN Clock frequency on pin CLKIN (Note 7) 27
MHz
VIL
Input Voltage level Low: CLKIN, RSTIN, CLKDIV1, CLKDIV2, CMDVCC, VSEL0,
VSEL1
0.3
0.3 x VDD
V
VIH
Input Voltage level High: CLKIN, RSTIN, CLKDIV1, CLKDIV2, CMDVCC, VSEL0,
VSEL1
0.7 x VDD
VDD + 0.3
V
|IIL|
CLKDIV1, CLKDIV2, CMDVCC, RSTIN, CLKIN, VSEL0, VSEL1 Low Level Input
Leakage Current, VIL = 0 V
1
mA
|IIH|
CLKDIV1, CLKDIV2, CMDVCC, RSTIN, CLKIN, VSEL0, VSEL1 Low Level Input
Leakage Current, VIH = VDD
1
mA
VIL
Input Voltage level Low: I/Ouc, AUX1uc, AUX2uc
0.3
0.5
V
VIH
Input Voltage level High: I/Ouc, AUX1uc, AUX2uc
0.7 x VDD
VDD + 0.3
V
|IIL |
I/Ouc, AUX1uc, AUX2uc Low level input leakage current, VIL = 0 V
600
mA
|IIH|
I/Ouc, AUX1uc, AUX2uc High level input leakage current, VIH = VDD
10
mA
VOH
VOL
tRi/Fi
tRo/Fo
I/Ouc, AUX1uc, AUX2uc data channels, @ Cs v 30 pF
High Level Output Voltage (CRD_I/O = CAUX1 = CAUX2 = CVCC)
IOH = 40 mA for VDD > 2 V (IOH = 20 mA for VDD v 2 V)
Low Level Output Voltage (CRD_I/O = CAUX1 = CAUX2 = 0 V)
IOL= + 1 mA
Input Rising/Falling times (Note
7)Output Rising/Falling times (Note
7)0.75 x VDD
0
VDD + 0.1
0.3
1.2
0.1
V
ms
Rpu
I/0uc, AUX1uc, AUX2uc Pull Up Resistor
8
11
16
kW
VOH
Output High Voltage
INT @ IOH = 15 mA (source)
0.75 x VDD
V
VOL
Output Low Voltage
INT @ IOL = 2 mA (sink)
0
0.30
V
RINT
INT Pull Up Resistor (opendrain output configuration option) (Note
8)40
50
60
kW
7. Guaranteed by design and characterization.
8. Option available under request (metal change). The current option is an inverterlike output.