參數(shù)資料
型號(hào): NCN8025AMNGEVB
廠商: ON Semiconductor
文件頁(yè)數(shù): 9/15頁(yè)
文件大?。?/td> 0K
描述: BOARD EVAL SMART CARD INTERFACE
設(shè)計(jì)資源: NCN8025AMNGEVB Test Procedure
NCN8025AMNGEVB Gerber Zip
NCN8025AMNGEVB Bill of Materials
NCN8025AMNGEVB Schematic
標(biāo)準(zhǔn)包裝: 1
主要目的: 接口,智能卡
嵌入式:
已用 IC / 零件: NCN8025A
已供物品:
其它名稱: NCN8025AMNGEVB-ND
NCN8025AMNGEVBOS
NCN8025 / NCN8025A
http://onsemi.com
3
VSEL1
VDDP
17
11
CVCC
24
12
1.8 V / 3 V / 5 V LDO
Card
Pin
Level
Shifters
&
Drivers
VDD
18
CLKIN
19
25
GND
14
RSTIN
5
CIO
8
GND
10 CRST
9
CCLK
16
GND
4
PRES
3
Supply Voltage
Monitoring
Thermal
Control
Card
Detection
Control Logic
and
Fault Detection
ISO7816
Sequencer
15
2
20
AUX1uc
7
CAUX1
21
6
AUX2uc
CAUX2
1
VSEL0
Clock Divider
23
22
CLKDIV1
CLKDIV2
13
PORADJ
Figure 4. NCN8025A Block Diagram (QFN24 Pin Numbering)
INT
CMDVCC
PRES
I/Ouc
PIN FUNCTION AND DESCRIPTION
Pin
(QFN24)
Pin
(QFN16)
Name
Type
Description
1
VSEL0
Input
Allows selecting card VCC power supply voltage mode (5V/3V or 1.8V/3V)
VSEL0 = Low; CVCC = 5 V when VSEL1 = High or 3 V when VSEL1 = Low
VSEL0 = High; CVCC = 1.8 V when VSEL1 = High or 3 V when VSEL1 = Low
2
VDDP
Power
Regulator power supply.
3
PRES
Input
Card presence pin active (card present) when PRES = Low. A builtin debounce timer of
about 8 ms is activated when a card is inserted. Convenient for Normally Open (NO)
Smart card connector.
4
PRES
Input
Card presence pin active (card present) when PRES = High. A builtin debounce timer of
about 8 ms is activated when a card is inserted. Convenient for Normally Closed (NC)
smart card connector.
5
4
CI/O
Input/
Output
This pin handles the connection to the serial I/O (C7) of the card connector. A
bidirectional level translator adapts the serial I/O signal between the card and the micro
controller. A 11 kW (typical) pull up resistor to CVCC provides a High impedance state for
the smart card I/O link.
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