參數(shù)資料
型號(hào): NCP500
廠商: ON SEMICONDUCTOR
元件分類(lèi): 基準(zhǔn)電壓源/電流源
英文描述: 150 mA CMOS Low Noise Low-Dropout Voltage Regulator(150 mA, CMOS,低噪聲,低壓差穩(wěn)壓器)
中文描述: 一五〇毫安CMOS低噪聲低壓差穩(wěn)壓器(150毫安的CMOS,低噪聲,低壓差穩(wěn)壓器)
文件頁(yè)數(shù): 1/20頁(yè)
文件大?。?/td> 142K
代理商: NCP500
Semiconductor Components Industries, LLC, 2006
February, 2006 Rev. 19
1
Publication Order Number:
NCP500/D
NCP500
150 mA CMOS Low Noise
LowDropout Voltage
Regulator
The NCP500 series of fixed output low dropout linear regulators are
designed for portable battery powered applications which require low
noise operation, fast enable response time, and low dropout. The
device achieves its low noise performance without the need of an
external noise bypass capacitor. Each device contains a voltage
reference unit, an error amplifier, a PMOS power transistor, and
resistors for setting output voltage, and current limit and temperature
limit protection circuits.
The NCP500 has been designed to be used with low cost ceramic
capacitors and requires a minimum output capacitor of 1.0 F.
Features
UltraLow Dropout Voltage of 170 mV at 150 mA
Fast Enable TurnOn Time of 20 sec
Wide Operating Voltage Range of 1.8 V to 6.0 V
Excellent Line and Load Regulation
High Accuracy Output Voltage of 2.5%
Enable Can Be Driven Directly by 1.0 V Logic
Typical RMS Noise Voltage 50 V with No Bypass Capacitor
(BW = 10 Hz to 100 kHz)
Very Small DFN 2x2.2 Package
PbFree Packages are Available
Typical Applications
Noise Sensitive Circuits VCO’s, RF Stages, etc.
SMPS PostRegulation
HandHeld Instrumentation
Camcorders and Cameras
Driver w/
Current
Limit
V
in
V
out
Thermal
Shutdown
Enable
GND
OFF
ON
1 (3)
3 (1)
5 (4)
2 (2, 5)
Figure 1. Simplified Block Diagram
NOTE: Pin numbers in parenthesis indicate DFN package.
See detailed ordering and shipping information in the package
dimensions section on page 17 of this data sheet.
ORDERING INFORMATION
TSOP5
SN SUFFIX
CASE 483
1
5
PIN CONNECTIONS AND
MARKING DIAGRAMS
1
3
N/C
V
in
2
GND
Enable
4
V
out
5
xxx = Specific Device Code
A
= Assembly Location
Y
= Year
W
= Work Week
= PbFree Package
(Note: Microdot may be in either location)
(Top View)
TSOP5
1
6
DFN 2x2.2 MM
SQL SUFFIX
CASE 488
1
3
N/C
V
in
2
GND
Enable
4
V
out
5
6
GND
(Top View)
http://onsemi.com
xxM
*For additional information on our PbFree strategy
and soldering details, please download the ON
Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
x
DFN 2x2.2 mm
xx
M
= Specific Device Code
= Date Code
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