參數(shù)資料
型號(hào)： ORT8850H
英文描述： Field-Programmable System Chip (FPSC) Eight-Channel x 850 Mbits/s Backplane Transceiver
中文描述： 現(xiàn)場可編程系統(tǒng)芯片（促進(jìn)文化基金）8通道x 850 Mbits /秒背板收發(fā)器
文件頁數(shù)： 59/112頁
文件大?。?/td> 2417K
代理商： ORT8850H
Agere Systems Inc.
59
Data Sheet
August 2001
Eight-Channel x 850 Mbits/s Backplane Transceiver
ORCA
ORT8850 FPSC
Embedded Core LVDS I/O
Table 22. Driver dc Data*
* V
DD
33 = 3.1 V
—
3.5 V, V
DD
15 = 1.4 V
—
1.6 V,
–
40
°
C, and slow-fast process.
External reference, REF10 = 1.0 V ± 3%, REF14 = 1.4 V ± 3%.
Table 23. Driver ac Data
*
* V
DD
33 = 3.1 V
—
3.5 V, V
DD
15 = 1.4 V
—
1.6 V,
–
40
°
C, and slow-fast process.
Table 24. Driver Power Consumption
*
* V
DD
33 = 3.1 V
—
3.5 V, V
DD
15 = 1.4 V
—
1.6 V,
–
40
°
C, and slow-fast process.
Parameter
Symbol
V
OH
V
OL
V
OD
V
OS
R
o
R
O
V
OD
Test Conditions
R
LOAD
= 100
± 1%
R
LOAD
= 100
± 1%
R
LOAD
= 100
± 1%
R
LOAD
= 100
± 1%
V
CM
= 1.0 V and 1.4 V
V
CM
= 1.0 V and 1.4 V
R
LOAD
= 100
± 1%
Min
—
0.925
0.25
1.125*
80
—
—
Typ
—
—
—
—
100
—
—
Max
1.475
—
0.45
1.275
120
10
25
Unit
V
V
V
V
%
mV
Output Voltage High, V
OA
or V
OB
Output Voltage Low, V
OA
or V
OB
Output Differential Voltage
Output Offset Voltage
Output Impedance, Differential
R
O
Mismatch Between A and B
Change in Differential Voltage Between
Complementary States
Change in Output Offset Voltage
Between Complementary States
Output Current
Output Current
Power-off Output Leakage
V
OS
R
LOAD
= 100
± 1%
—
—
25
mV
I
SA,
I
SB
I
SAB
|Ixa|, |Ixb|
Driver shorted to GND
Drivers shorted together
V
DD
= 0 V
V
PAD
, V
PADN
= 0 V
—
2.5 V
—
—
—
—
—
—
24
12
10
mA
mA
mA
Parameter
Symbol
t
F
Test Conditions
Z
L
= 100
± 1%
C
PAD
= 3.0 pF, C
PAD
= 3.0 pF
Z
L
= 100
± 1%
C
PAD
= 3.0 pF, C
PAD
= 3.0 pF
Any differential pair on package at 50%
point of the transition
Min
100
Typ
—
Max
210
Unit
ps
V
OD
Fall Time, 80% to 20%
V
OD
Rise Time, 20% to 80%
t
R
100
—
210
ps
Differential Skew
|t
PHLA
–
t
PLHB
| or
|t
PHLB
–
t
PLHA
|
Channel-to-channel Skew
|tpDIFFm
–
tpDIFFn|,
Propagation Delay Time
t
SKEW1
—
—
50
ps
t
SKEW2
Any two signals on package at 0 V
differential
Z
L
= 100
± 1%
C
PAD
= 3.0 pF, C
PADN
= 3.0 pF
—
—
—
ps
t
PLH
t
PHL
0.54
0.55
0.77
0.76
1.10
1.09
ns
ns
Parameter
Symbol
PD
dc
PD
ac
Test Conditions
Z
L
= 100
± 1%
Z
L
= 100
± 1%
C
PAD
= 3.0 pF, C
PADN
= 3.0 pF
Min
—
—
Max
26.0
64
Unit
mW
μ
W/
MHz
Driver dc Power
Driver ac Power
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