- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄383727 > OX16PCI954 (Electronic Theatre Controls, Inc.) Integrated Quad UART and PCI interface PDF資料下載
參數(shù)資料
| 型號： | OX16PCI954 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Integrated Quad UART and PCI interface |
| 中文描述： | 綜合四UART和PCI接口 |
| 文件頁數(shù)： | 19/72頁 |
| 文件大?。?/td> | 656K |
| 代理商： | OX16PCI954 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁當(dāng)前第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁
6.4.2
This register configures the operation of the multi-purpose I/O pins ‘MIO[11:0] as follows.
Bits
Description
1:0
MIO0 Configuration Register (Mode[1:0]
≠
‘01’).
00 -> MIO0 is a non-inverting input pin
01 -> MIO0 is an inverting input pin
10 -> MIO0 is an output pin driving ‘0’
11 -> MIO0 is an output pin driving ‘1’
Unused (Mode[1:0]=‘01’). When Parallel Port is enabled, MIO[0] pin is
unused and will remain in forcing output mode.
3:2
MIO1 Configuration Register (LCC[6:5]=‘00’).
00 -> MIO1 is a non-inverting input pin
01 -> MIO1 is an inverting input pin
10 -> MIO1 is an output pin driving ‘0’
11 -> MIO1 is an output pin driving ‘1’
Unused (LCC[6:5]
≠
‘00’). When power-down mode in Function0 is
enabled, MIO1 pin is unused and will remain in forcing output mode.
5:4
MIO2 Configuration Register (LCC[7]=’0’).
00 -> MIO2 is a non-inverting input pin
01 -> MIO2 is an inverting input pin
10 -> MIO2 is output pin driving ‘0’
11 -> MIO2 is output pin driving ‘1’
PME_Input (LCC[7]=’1’). When LCC[7] is set, MIO2 pin is re-defined to
PME_Input. It’s polarity will be controlled by MIC[4]. It sets the sticky
PME_Status bit in Function1.
7:6
MIO3 Configuration Register.
00 -> MIO3 is a non-inverting input pin
01 -> MIO3 is an inverting input pin
10 -> MIO3 is an output pin driving ‘0’
11 -> MIO3 is an output pin driving ‘1’
9:8
MIO4 Configuration Register.
00 -> MIO4 is a non-inverting input pin
01 -> MIO4 is an inverting input pin
10 -> MIO4 is an output pin driving ‘0’
11 -> MIO4 is an output pin driving ‘1’
11:10
MIO5 Configuration Register.
00 -> MIO5 is a non-inverting input pin
01 -> MIO5 is an inverting input pin
10 -> MIO5 is an output pin driving ‘0’
11 -> MIO5 is an output pin driving ‘1’
13:12
MIO6 Configuration Register.
00 -> MIO6 is a non-inverting input pin
01 -> MIO6 is an inverting input pin
10 -> MIO6 is an output pin driving ‘0’
11 -> MIO6 is an output pin driving ‘1’
15:14
MIO7 Configuration Register.
00 -> MIO7 is a non-inverting input pin
01 -> MIO7 is an inverting input pin
10 -> MIO7 is an output pin driving ‘0’
11 -> MIO7 is an output pin driving ‘1’
Data Sheet Revision 1.3
Page 19
OX16PCI954
OXFORD SEMICONDUCTOR LTD.
Multi-purpose I/O Configuration register ‘MIC’ (Offset 0x04)
Read/Write
EEPROM
W
Reset
00
PCI
RW
W
RW
00
W
RW
00
W
RW
00
W
RW
00
W
RW
00
W
RW
00
W
RW
00
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| OX16PCI954-TQC60-A | Integrated Quad UART and PCI interface |
| OX4240 | OCXO |
| OX1040 | OCXO |
| OX1041 | OCXO |
| OX1042 | OCXO |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| OX16PCI954_05 | 制造商:OXFORD 制造商全稱:OXFORD 功能描述:Integrated Quad UART and PCI interface |
| OX16PCI954-TQA1G | 功能描述:外圍驅(qū)動器與原件 - PCI PCI bridge to quad serial & para. port RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| OX16PCI954-TQC60-A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Integrated Quad UART and PCI interface |
| OX16PCI954-TQC60-A1 | 制造商:OXFORD 制造商全稱:OXFORD 功能描述:Integrated Quad UART and PCI interface |
| OX16PCI958 | 制造商:OXFORD 制造商全稱:OXFORD 功能描述:Octal UART with PCI Interface |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。