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參數(shù)資料
| 型號： | P11C68-IGDPBS |
| 廠商： | Zarlink Semiconductor Inc. |
| 英文描述： | CMOS/SNOS NVSRAM HIGH PERFORMANCE 8 K x 8 NON-VOLATILE STATIC RAM |
| 中文描述： | 的CMOS / SNOS非易失性SRAM的高性能8畝× 8非易失性靜態(tài)RAM的 |
| 文件頁數(shù)： | 8/17頁 |
| 文件大?。?/td> | 162K |
| 代理商： | P11C68-IGDPBS |
P10C68/P11C68
8
5.0V
3.3V
AUTO RECALL
STORE INHIBIT
V
CC
t
Figure 8. Automatic RECALL and STORE inhibit.
NON-VOLATILE MEMORY OPERATION OF P10C68
MODE SELECTION
W
X
H
L
H
L
L
H
E
H
L
L
L
L
L
L
G
X
L
X
L
H
L
H
NE
X
H
H
L
L
L
X
Power
Standby
Active
Active
Active
I
CC2
Active
Mode
Not selected
Read RAM
Write RAM
Non-volatile recall (Note 15)
Non-volatile store
No operation
NOTE
15.
An automatic RECALL also takes place on chip power-up, starting when Vcc exceeds 3.3V, and taking t
RECALL
from the
time at which Vcc exceeds 3.3V. Vcc must not drop below 3.3V once it has exceeded it for the RECALL to function
properly.
Standard
t
WLQX
t
GHNL
t
NLWL
t
WLNH
t
ELWL
Alternative
t
STORE
t
WC
Parameter
Store cycle time
Output disable set-up to NE (bar) fall
Non-volatile set-up to write low
Write low to NE (bar) rise
Chip enable SET-UP
Symbol
Notes
17
18
Units
ms
ns
ns
ns
ns
Min.
0
0
45
0
Max.
10
Min.
0
0
45
0
Max.
10
STORE CYCLE 1 : W (BAR) CONTROLLED
(See note 16)
P10C68-35
P10C68-45
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| P10C68 | CMOS/SNOS NVSRAM HIGH PERFORMANCE 8 K x 8 NON-VOLATILE STATIC RAM |
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