參數(shù)資料
型號(hào)： P12611EJ1V0AN00
英文描述： MCU CMOS 28 LD 20MHZ 8K FLASH, -40C to +85C, 28-SOIC 300mil, TUBE
中文描述： uPB1509GV 1 GHz的輸入除以2。 4。 8預(yù)分頻器集成電路便攜式無(wú)線電系統(tǒng)
文件頁(yè)數(shù)： 8/19頁(yè)
文件大?。?/td> 110K
代理商： P12611EJ1V0AN00
2
The major features and applications of the
μ
PB1509GV are descried below.
[Features]
<1>
Small size for space reduction
: 8-pin plastic SSOP (175 mil)
Package size = 3.0
×
3.2
×
1.8 mm
<2>
Low current consumption suitable to battery-driven systems
: 5.0 mA
TYP
at V
CC
= 3.0 V (4.0 mA at 2.2 V)
<3>
Wider range of power supply voltage allowing flexible designs
: V
CC
= 2.2 to 5.5 V
<4>
Wider range of operating frequency providing various system configuration options
: f
in
= 50 MHz to 700 MHz in divide by 2 mode
f
in
= 50 MHz to 800 MHz in divide by 4 mode
f
in
= 50 MHz to 1000 MHz in divide by 8 mode
<5>
Selectable divide ratios allowing an optimal response frequency to be specified for succeeding stages
: f
out
= 25 MHz to 350 MHz in divide by 2 mode
f
out
= 12.5 MHz to 200 MHz in divide by 4 mode
f
out
= 6.25 MHz to 125 MHz in divide by 8 mode
[Typical applications]
Portable radios
Portable radio communication systems
2.2 Process Technology
The
μ
PB1509GV is manufactured using NEC-proprietary silicon bipolar process technology called NESATIV.
This section describes the features of this process.
The cross-sectional drawing of the transistor manufactured using this process is shown in Figure 2-1. The
following roughly explains the major features of this process.
<1>
A high gain-bandwidth product (f
T
) is realized by reduction of the emitter junction thickness of the transistor.
(f
T
= 20 GHz for NESATIV and f
T
= 10 GHz for NESATII).
Low-noise and high-gain operation is realized due to a reduced base resistance and E-B junction
capacitance by minimizing the emitter width and base junction thicknesses of the transistor
(emitter width = 0.6
μ
m for NESATIV and = 1.0
μ
m for NESATII).
For high reliability such as high moisture proofness, the direct nitride-film construction process is used in
which a nitride film covers the base and emitter surface previously covered by a thin oxide film.
<2>
<3>
The features of this process realize high-performance ICs having high reliability and electrical characteristics.
Figure 2-2. Cross-Sectional Drawing of Transistor (Elements in IC) using NESAT Process
Collector
Base
Emitter
Electrode
Oxide film
Epitaxial layer
n
+
layer
Substrate
Channel stopper
Polysilicon
Nitride film
P
P
P
P
–
n
n
n
+
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