參數(shù)資料
型號(hào): P80C32X2FN,112
廠商: NXP Semiconductors
文件頁(yè)數(shù): 12/62頁(yè)
文件大?。?/td> 0K
描述: IC 80C51 MCU 256 ROMLESS 40DIP
產(chǎn)品培訓(xùn)模塊: Migrating from 8/16-Bit MCUs to 32-Bit ARMs
標(biāo)準(zhǔn)包裝: 9
系列: 80C
核心處理器: 8051
芯體尺寸: 8-位
速度: 33MHz
連通性: EBI/EMI,UART/USART
外圍設(shè)備: POR
輸入/輸出數(shù): 32
程序存儲(chǔ)器類型: ROMless
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 40-DIP(0.600",15.24mm)
包裝: 管件
其它名稱: 568-7900-5
568-7900-5-ND
568-8351-5
935269611112
P80C32X2FN
P80C32X2FN,112-ND
P80C32X2FN-ND
Philips Semiconductors
Product data
P80C3xX2; P80C5xX2;
P87C5xX2
80C51 8-bit microcontroller family
4K/8K/16K/32K ROM/OTP, low voltage (2.7 to 5.5 V),
low power, high speed (30/33 MHz)
2
2003 Jan 24
853-2337 29260
DESCRIPTION
The Philips microcontrollers described in this data sheet are
high-performance static 80C51 designs incorporating Philips’
high-density CMOS technology with operation from 2.7 V to 5.5 V.
They support both 6-clock and 12-clock operation.
The P8xC31X2/51X2 and P8xC32X2/52X2/54X2/58X2 contain
128 byte RAM and 256 byte RAM respectively, 32 I/O lines, three
16-bit counter/timers, a six-source, four-priority level nested interrupt
structure, a serial I/O port for either multi-processor
communications, I/O expansion or full duplex UART, and on-chip
oscillator and clock circuits.
In addition, the devices are low power static designs which offer a
wide range of operating frequencies down to zero. Two software
selectable modes of power reduction — idle mode and power-down
mode — are available. The idle mode freezes the CPU while
allowing the RAM, timers, serial port, and interrupt system to
continue functioning. The power-down mode saves the RAM
contents but freezes the oscillator, causing all other chip functions to
be inoperative. Since the design is static, the clock can be stopped
without loss of user data. Then the execution can be resumed from
the point the clock was stopped.
SELECTION TABLE
For applications requiring more ROM and RAM, as well as more
on-chip peripherals, see the P89C66x and P89C51Rx2 data sheets.
Type
Memory
Timers
Serial Interfaces
RAM
ROM
OTP
Flash
#
of
T
imers
PWM
PCA
WD
UART
I2
C
CAN
SPI
ADC
bits/ch.
I/O
Pins
Interrupts
(External)
Program
Security
Default
Clock
Rate
Optional
Clock
Rate
Max.
Freq.
at 6-clk
/ 12-clk
(MHz)
Freq.
Range
at
3V
(MHz)
Freq.
Range
at
5V
(MHz)
P87C58X2
256B
32K
3
n
32
6 (2)
n
12–clk
6-clk
30/33
0–16
0–30/33
P80C58X2
256B
32K
3
n
32
6 (2)
n
12–clk
6-clk
30/33
0–16
0–30/33
P87C54X2
256B
16K
3
n
32
6 (2)
n
12–clk
6-clk
30/33
0–16
0–30/33
P80C54X2
256B
16K
3
n
32
6 (2)
n
12–clk
6-clk
30/33
0–16
0–30/33
P87C52X2
256B
8K
3
n
32
6 (2)
n
12–clk
6-clk
30/33
0–16
0–30/33
P80C52X2
256B
8K
3
n
32
6 (2)
n
12–clk
6-clk
30/33
0–16
0–30/33
P87C51X2
128B
4K
3
n
32
6 (2)
n
12–clk
6-clk
30/33
0–16
0–30/33
P80C51X2
128B
4K
3
n
32
6 (2)
n
12–clk
6-clk
30/33
0–16
0–30/33
P80C32X2
256B
3
n
32
6 (2)
12–clk
6-clk
30/33
0–16
0–30/33
P80C31X2
128B
3
n
32
6 (2)
12–clk
6-clk
30/33
0–16
0–30/33
NOTE:
1. I2C = Inter-Integrated Circuit Bus; CAN = Controller Area Network; SPI = Serial Peripheral Interface; PCA = Programmable Counter Array;
ADC = Analog-to-Digital Converter; PWM = Pulse Width Modulation
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