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參數(shù)資料
| 型號： | P83C834 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 8-bit microcontrollers with LCD-driver |
| 中文描述： | 8位微控制器與LCD驅(qū)動器 |
| 文件頁數(shù)： | 17/36頁 |
| 文件大小： | 165K |
| 代理商： | P83C834 |
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1997 Jul 03
17
Philips Semiconductors
Product specification
8-bit microcontrollers with LCD-driver
P83C434; P83C834
6.6.5
LCD C
ONTROL
R
EGISTER
(LCDCON)
After an external or Power-on-reset the LCD Control Register holds the value 0CH (see Table 10) resulting in:
The LCD is disabled. All segment and backplane drivers are set to the V
SS
level.
BIAS is set to generate
1
3
V
DD(P)
.
Bits MD0 and MD1 reset the multiplex ratio to the 1 : 4 mode.
Table 17
LCD Control Register (address B9H)
Table 18
Description of LCDCON bits
Table 19
Multiplex ratio mode selection
6.6.6
LCD
SEGMENT DISPLAY REGISTERS
(LCD0
TO
LCD11)
The 12 display registers, LCD0 to LCD11, are 8-bit derivative (Read/Write) registers which store LCD segment data.
For detailed information, regarding the LCD0 to LCD11, see Table 23 in Section 6.7.7.
7
6
5
4
3
2
1
0
MD1
MD0
BIAS
ENLCD
BIT
SYMBOL
DESCRIPTION
7 to 4
3
2
1
MD1
MD0
BIAS
Reserved.
Mode bits
. MD0 and MD1 determine the multiplex rate; see Table 19.
The BIAS bit
sets the LCD voltage bias generator. If BIAS is:
HIGH, then the LCD voltage bias generator is set to
1
2
V
DD(P)
.
LOW, then the LCD voltage bias generator is set to
1
3
V
DD(P)
.
Enable LCD
. If ENLCD is:
LOW, then the LCD is disabled.
All segment and backplane drivers are set to the V
SS
level.
HIGH, then the LCD is enabled and character display is possible.
0
ENLCD
MD1
MD0
MULTIPLEX RATIO MODE
0
0
1
1
0
1
0
1
static
1 : 2
1 : 3
1 : 4
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