參數(shù)資料
型號： P83CE598FHB
廠商： NXP SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： 8-bit microcontroller with CAN controller(帶CAN控制器的8位微控制器)
中文描述： 8-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP80
封裝： PLASTIC, QFP-80
文件頁數(shù)： 25/108頁
文件大?。?/td> 661K
代理商： P83CE598FHB
1996 Jun 27
25
Philips Semiconductors
Product specification
8-bit microcontroller with on-chip CAN
P8xCE598
11.2.3
T
IMER
I
NTERRUPT
F
LAG REGISTER
(TM2IR)
Table 22
Timer Interrupt Flag register (address C8H)
Table 23
Description of the TM2IR bits (see notes 1 and 2)
Notes
1.
2.
Interrupt Enable IEN1 is used to enable/disable Timer 2 interrupts (see Section 14.1.2).
Interrupt Priority Register IP1 is used to determine the Timer 2 interrupt priority (see Section 14.1.4).
11.2.4
S
ET
E
NABLE REGISTER
(STE)
Table 24
Set Enable register (address EEH)
Table 25
Description of the STE bits (see notes 1 and 2)
Notes
1.
2.
If STE.n is LOW then P4.n is not affected by a match of CM0 and T2 (n = 0, 1, 2, 3, 4, 5).
STE.6 and STE.7 are read only.
7
6
5
4
3
2
1
0
T2OV
CMI2
CMI1
CMI0
CTI3
CTI2
CTI1
CTI0
BIT
SYMBOL
FUNCTION
7
6
5
4
3
2
1
0
T2OV
CMI2
CMI1
CMI0
CTI3
CTI2
CTI1
CTI0
T2: 16-bit overflow interrupt flag.
CM2: interrupt flag.
CM1: interrupt flag.
CM0: interrupt flag.
CT3: interrupt flag.
CT2: interrupt flag.
CT1: interrupt flag.
CT0: interrupt flag.
7
6
5
4
3
2
1
0
TG47
TG46
SP45
SP44
SP43
SP42
SP41
SP40
BIT
SYMBOL
FUNCTION
7
6
5
4
3
2
1
0
TG47
TG46
SP45
SP44
SP43
SP42
SP41
SP40
if HIGH then P4.7 is reset on the next toggle, if LOW P4.7 is set on the next toggle.
if HIGH then P4.6 is reset on the next toggle, if LOW P4.6 is set on the next toggle.
if HIGH then P4.5 is set on a match of CM0 and T2.
if HIGH then P4.4 is set on a match of CM0 and T2.
if HIGH then P4.3 is set on a match of CM0 and T2.
if HIGH then P4.2 is set on a match of CM0 and T2.
if HIGH then P4.1 is set on a match of CM0 and T2.
if HIGH then P4.0 is set on a match of CM0 and T2.
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