參數(shù)資料
型號: P89LPC952FA,512
廠商: NXP Semiconductors
文件頁數(shù): 41/69頁
文件大?。?/td> 0K
描述: IC 80C51 MCU FLASH 8K 44-PLCC
產(chǎn)品培訓(xùn)模塊: Migrating from 8/16-Bit MCUs to 32-Bit ARMs
標(biāo)準包裝: 26
系列: LPC900
核心處理器: 8051
芯體尺寸: 8-位
速度: 18MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 40
程序存儲器容量: 8KB(8K x 8)
程序存儲器類型: 閃存
RAM 容量: 512 x 8
電壓 - 電源 (Vcc/Vdd): 2.4 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-LCC(J 形引線)
包裝: 管件
產(chǎn)品目錄頁面: 706 (CN2011-ZH PDF)
配用: 622-1016-ND - BOARD FOR P89LPC952FA 44-PLCC
622-1008-ND - BOARD FOR LPC9103 10-HVSON
OM10075-ND - EVAL BOARD FOR LPC952
568-4000-ND - DEMO BOARD SPI/I2C TO DUAL UART
568-3510-ND - DEMO BOARD SPI/I2C TO UART
622-1002-ND - USB IN-CIRCUIT PROG LPC9XX
568-1759-ND - EMULATOR DEBUGGER/PROGRMMR LPC9X
其它名稱: 568-2253-5
935280148512
P89LPC952FA
P89LPC952_954_4
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 — 24 July 2008
46 of 69
NXP Semiconductors
P89LPC952/954
8-bit microcontroller with 10-bit ADC
7.26.9 Power-on reset code execution
The P89LPC952/954 contains two special ash elements: the Boot Vector and the Boot
Status bit. Following reset, the P89LPC952/954 examines the contents of the Boot Status
bit. If the Boot Status bit is set to zero, power-up execution starts at location 0000H, which
is the normal start address of the user’s application code. When the Boot Status bit is set
to a value other than zero, the contents of the Boot Vector are used as the high byte of the
execution address and the low byte is set to 00H.
Table 9 shows the factory default Boot Vector setting for these devices. A factory-provided
bootloader is pre-programmed into the address space indicated and uses the indicated
bootloader entry point to perform ISP functions. This code can be erased by the user.
Users who wish to use this loader should take precautions to avoid erasing the
1 kB sector that contains this bootloader. Instead, the page erase function can be
used to erase the rst eight 64-byte pages located in this sector. A custom
bootloader can be written with the Boot Vector set to the custom bootloader, if desired.
7.26.10 Hardware activation of the bootloader
The bootloader can also be executed by forcing the device into ISP mode during a
power-on sequence (see the P89LPC952/954
User’s Manual for specic information).
This has the same effect as having a non-zero status byte. This allows an application to
be built that will normally execute user code but can be manually forced into ISP
operation. If the factory default setting for the boot vector (1FH/3FH) is changed, it will no
longer point to the factory pre-programmed ISP bootloader code. After programming the
ash, the status byte should be programmed to zero in order to allow execution of the
user’s application code beginning at address 0000H.
7.27 User conguration bytes
Some user-congurable features of the P89LPC952/954 must be dened at power-up and
therefore cannot be set by the program after start of execution. These features are
congured through the use of the ash byte UCFG1. Please see the P89LPC952/954
User’s Manual for additional details.
7.28 User sector security bytes
There are eight/sixteen User Sector Security Bytes on the P89LPC952/954. Each byte
corresponds to one sector. Please see the P89LPC952/954
User’s Manual for additional
details.
Table 9.
Default boot vector values and ISP entry points
Device
Default
boot vector
Default
bootloader
entry point
Default bootloader
code range
1 kB sector
range
P89LPC952
1FH
1F00H
1E00H to 1FFFH
1C00H to 1FFFH
P89LPC954
3FH
3F00H
3E00H to 3FFFH
3C00H to 3FFFH
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