參數(shù)資料
型號： PC7447VG933N
廠商： Atmel Corp.
英文描述： PowerPC 7457 RISC Microprocessor
中文描述： 7457的PowerPC RISC微處理器
文件頁數(shù)： 11/66頁
文件大小： 522K
代理商： PC7447VG933N
11
PC7457/47 [Preliminary]
5345B–HIREL–02/04
Detailed
Specification
Scope
This specification describes the specific requirements for the microprocessor PC7457 in
compliance with Atmel standard screening.
Applicable
Documents
1.
2.
MIL-STD-883: Test methods and procedures for electronics
MIL-PRF-38535: Appendix A: General specifications for microcircuits
Requirements
General
The microcircuits are in accordance with the applicable documents and as specified
herein.
Design and Construction
Terminal Connections
Depending on the package, the terminal connections are as shown in Table 16, Table 3
and Figure 2.
Absolute Maximum
Ratings
Notes:
1. Functional and tested operating conditions are given in Table 3 on page 12. Absolute maximum ratings are stress ratings
only, and functional operation at the maximums is not guaranteed. Stresses beyond those listed may affect device reliability
or cause permanent damage to the device.
2. Caution: V
DD
/AV
DD
must not exceed OV
DD
/GV
DD
by more than 1V during normal operation; this limit may be exceeded for a
maximum of 20 ms during power-on reset and power-down sequences.
3. Caution: OV
DD
/GV
DD
must not exceed V
DD
/AV
DD
by more than 2V during normal operation; this limit may be exceeded for a
maximum of 20 ms during power-on reset and power-down sequences.
4. BVSEL must be set to 0, such that the bus is in 1.8V mode.
5. BVSEL must be set to HRESET or 1, such that the bus is in 2.5V mode.
6. L3VSEL must be set to HRESET (inverse of HRESET), such that the bus is in 1.5V mode.
Table 2.
Absolute Maximum Ratings
(1)
Symbol
Characteristic
Maximum Value
Unit
V
DD
(2)
Core supply voltage
-0.3 to 1.60
V
AV
DD
(2)
PLL supply voltage
-0.3 to 1.60
V
OV
DD
(3)(4)
Processor bus supply voltage
BVSEL = 0
-0.3 to 1.95
V
OV
DD
(3)(5)
BVSEL = HRESET or OV
DD
-0.3 to 2.7
V
GV
DD
(3)(6)
L3 bus supply voltage
L3VSEL = HRESET
-0.3 to 1.65
V
GV
DD
(3)(7)
L3VSEL = 0
-0.3 to 1.95
V
GV
DD
(3)(8)
L3VSEL = HRESET or GV
DD
-0.3 to 2.7
V
V
IN
(9)(10)
Input voltage
Processor bus
-0.3 to OV
DD
+ 0.3
V
V
IN
(9)(10)
L3 bus
-0.3 to GV
DD
+ 0.3
V
V
IN
JTAG signals
-0.3 to OV
DD
+ 0.3
V
T
STG
Storage temperature range
-55 to 150
°
C
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