參數(shù)資料
型號(hào): PC7447VG933N
廠商: Atmel Corp.
英文描述: PowerPC 7457 RISC Microprocessor
中文描述: 7457的PowerPC RISC微處理器
文件頁數(shù): 56/66頁
文件大?。?/td> 522K
代理商: PC7447VG933N
56
PC7457/47 [Preliminary]
5345B–HIREL–02/04
Pull-up/Pull-down
Resistor Requirements
The PC7457 requires high-resistive (weak: 4.7 k
) pull-up resistors on several control
pins of the bus interface to maintain the control signals in the negated state after they
have been actively negated and released by the PC7457 or other bus masters. These
pins are TS, ARTRY, SHDO, and SHD1.
Some pins designated as being for factory test must be pulled up to OVDD or down to
GND to ensure proper device operation. For the PC7447, 360 BGA, the pins that must
be pulled up to OVDD are LSSD_MODE and TEST[0:3]; the pins that must be pulled
down to GND are L1_TSTCLK and TEST[4]. For the PC7457, 483 BGA, the pins that
must be pulled up to OVDD are LSSD_MODE and TEST[0:5]; the pins that must be
pulled down are L1_TSTCLK and TEST[6]. The CKSTP_IN signal should likewise be
pulled up through a pull-up resistor (weak or stronger: 4.7 – 1 k
) to prevent erroneous
assertions of this signal. In addition, the PC7457 has one open-drain style output that
requires a pull-up resistor (weak or stronger: 4.7 – 1 k
) if it is used by the system. This
pin is CKSTP_OUT.
If pull-down resistors are used to configure BVSEL or L3VSEL, the resistors should be
less than 250
(see Table 16 on page 40). Because PLL_CFG[0:4] must remain stable
during normal operation, strong pull-up and pull-down resistors (1 k
or less) are rec-
ommended to configure these signals in order to protect against erroneous switching
due to ground bounce, power supply noise or noise coupling.
During inactive periods on the bus, the address and transfer attributes may not be
driven by any master and may, therefore, float in the high-impedance state for relatively
long periods of time. Because the PC7457 must continually monitor these signals for
snooping, this float condition may cause excessive power draw by the input receivers on
the PC7457 or by other receivers in the system. It is recommended that these signals be
pulled up through weak (4.7 k
) pull-up resistors by the system, or that they may be oth-
erwise driven by the system during inactive periods of the bus. The snooped address
and transfer attribute inputs are A[0:35], AP[0:4], TT[0:4], CI, WT, and GBL.
If extended addressing is not used, A[0:3] are unused and must be pulled low to GND
through weak pull-down resistors. If the PC7457 is in 60x bus mode, DTI[0:3] must be
pulled low to GND through weak pull-down resistors.
The data bus input receivers are normally turned off when no read operation is in
progress and, therefore,
don’t
require pull-up resistors on the bus. Other data bus receiv-
ers in the system, however, may require pull-ups, or that those signals be otherwise
driven by the system during inactive periods by the system. The data bus signals are
D[0:63] and DP[0:7].
If address or data parity is not used by the system, and the respective parity checking is
disabled through HID0, the input receivers for those pins are disabled, and those pins
don’t
require pull-up resistors and should be left unconnected by the system. If all parity
generation is disabled through HID0, then all parity checking should also be disabled
through HID0, and all parity pins may be left unconnected by the system.
The L3 interface does not normally require pull-up resistors.
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