參數(shù)資料
型號： PCA9539PW,112
廠商： NXP Semiconductors
文件頁數(shù)： 7/37頁
文件大?。?/td> 0K
描述： IC I/O EXPANDER I2C 16B 24TSSOP
產(chǎn)品培訓模塊： I²C Bus Fundamentals
特色產(chǎn)品： NXP - I2C Interface
標準包裝： 63
接口： I²C，SM 總線
輸入/輸出數(shù)： 16
中斷輸出： 是
頻率 - 時鐘： 400kHz
電源電壓： 2.3 V ~ 5.5 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 24-TSSOP（0.173"，4.40mm 寬）
供應商設備封裝： 24-TSSOP
包裝： 管件
包括： POR
產(chǎn)品目錄頁面： 825 (CN2011-ZH PDF)
其它名稱： 568-5025
935277298112
PCA9539PW
PCA9539PW,112-ND
PCA9539PW-ND
PCA9539_PCA9539R
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 6 — 6 February 2013
15 of 37
NXP Semiconductors
PCA9539; PCA9539R
16-bit I2C-bus and SMBus low power I/O port with interrupt and reset
7.2 System configuration
A device generating a message is a ‘transmitter’; a device receiving is the ‘receiver’. The
device that controls the message is the ‘master’ and the devices which are controlled by
the master are the ‘slaves’ (see Figure 14).
7.3 Acknowledge
The number of data bytes transferred between the START and the STOP conditions from
transmitter to receiver is not limited. Each byte of eight bits is followed by one
acknowledge bit. The acknowledge bit is a HIGH level put on the bus by the transmitter,
whereas the master generates an extra acknowledge related clock pulse.
A slave receiver which is addressed must generate an acknowledge after the reception of
each byte. Also a master must generate an acknowledge after the reception of each byte
that has been clocked out of the slave transmitter. The device that acknowledges has to
pull down the SDA line during the acknowledge clock pulse, so that the SDA line is stable
LOW during the HIGH period of the acknowledge related clock pulse; set-up time and hold
time must be taken into account.
A master receiver must signal an end of data to the transmitter by not generating an
acknowledge on the last byte that has been clocked out of the slave. In this event, the
transmitter must leave the data line HIGH to enable the master to generate a STOP
condition.
Fig 14. System configuration
002aaa966
MASTER
TRANSMITTER/
RECEIVER
SLAVE
RECEIVER
SLAVE
TRANSMITTER/
RECEIVER
MASTER
TRANSMITTER
MASTER
TRANSMITTER/
RECEIVER
SDA
SCL
I2C-BUS
MULTIPLEXER
SLAVE
Fig 15. Acknowledgement on the I2C-bus
002aaa987
S
START
condition
9
8
2
1
clock pulse for
acknowledgement
not acknowledge
acknowledge
data output
by transmitter
data output
by receiver
SCL from master
相關PDF資料
PDF描述
PCA9698BS,118 IC I/O EXPANDER I2C 40B 56HVQFN
PCA9555D,112 IC I/O EXPANDER I2C 16B 24SOIC
PCA9555DB,112 IC I/O EXPANDER I2C 16B 24SSOP
PCA9555PW,112 IC I/O EXPANDER I2C 16B 24TSSOP
5-531478-4 CONT.MINI-LEAF STRIP
相關代理商/技術參數(shù)
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PCA9539PWR 功能描述:接口-I/O擴展器 16-Bit I2C & SMBus Lo-Pwr I/O Expander RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel
PCA9539PWRE4 功能描述:接口-I/O擴展器 16-Bit I2C & SMBus Lo-Pwr I/O Expander RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel
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