參數(shù)資料
型號(hào): PCA9555BS,118
廠商: NXP Semiconductors
文件頁數(shù): 4/34頁
文件大?。?/td> 0K
描述: IC I/O EXPANDER I2C 16B 24HVQFN
產(chǎn)品培訓(xùn)模塊: I²C Bus Fundamentals
特色產(chǎn)品: NXP - I2C Interface
標(biāo)準(zhǔn)包裝: 1
接口: I²C,SM 總線
輸入/輸出數(shù): 16
中斷輸出:
頻率 - 時(shí)鐘: 400kHz
電源電壓: 2.3 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 24-HVQFN(4x4)
包裝: 標(biāo)準(zhǔn)包裝
包括: POR
產(chǎn)品目錄頁面: 826 (CN2011-ZH PDF)
配用: 568-4002-ND - DEMO BOARD I2C
其它名稱: 568-2382-6
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PCA9555_8
NXP
B
.V
.2009.
All
r
ights
reser
v
ed.
Pr
oduct
data
sheet
Re
v
.08
22
October
2009
12
of
34
NXP
Semiconductor
s
PCA9555
16-bit
I
2C-b
us
and
SMBus
I/O
por
twith
interrupt
Remark: Transfer of data can be stopped at any moment by a STOP condition. When this occurs, data present at the latest acknowledge phase is valid (output mode). It
is assumed that the command byte has previously been set to ‘00’ (read Input Port register).
Fig 13. Read Input port register, scenario 1
1
0
A2 A1 A0
1
A
S0
START condition
R/W
acknowledge
from slave
002aac223
A
SCL
SDA
A
read from port 0
P
9
8
7
6
5
4
3
2
1
I0.x
slave address
STOP condition
acknowledge
from master
A
I1.x
acknowledge
from master
A
I0.x
acknowledge
from master
1
I1.x
non acknowledge
from master
data into port 0
read from port 1
data into port 1
INT
6543210
7
6543210
7
6543210
7
6543210
7
INT
tv(INT_N)
trst(INT_N)
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PCA9555D/G-T 功能描述:IC I/O EXPANDER I2C 16B 24SOIC RoHS:是 類別:集成電路 (IC) >> 接口 - I/O 擴(kuò)展器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:74 系列:- 接口:I²C,JTAG 輸入/輸出數(shù):9 中斷輸出:無 頻率 - 時(shí)鐘:400kHz 電源電壓:2.7 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:20-TSSOP(0.173",4.40mm 寬) 供應(yīng)商設(shè)備封裝:20-TSSOP 包裝:管件 包括:EEPROM