- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄367813 > PCD5002 (NXP Semiconductors N.V.) Advanced POCSAG and APOC-1 Paging Decoder PDF資料下載
參數(shù)資料
| 型號： | PCD5002 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Advanced POCSAG and APOC-1 Paging Decoder |
| 中文描述： | 高級POCSAG碼和載脂蛋白C - 1尋呼解碼器 |
| 文件頁數(shù)： | 11/48頁 |
| 文件大?。?/td> | 203K |
| 代理商： | PCD5002 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁當(dāng)前第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁
1997 Jun 24
11
Philips Semiconductors
Product specification
Advanced POCSAG and APOC-1 Paging
Decoder
PCD5002
Fig.5 APOC-1 synchronization algorithm.
handbook, full pagewidth
batch zero identify
no batch zero ID
batch
zero ID
batch zero ID
TX off
time out
no sync word
or preamble
no sync word
sync word
OFF to ON status
preamble
sync word
sync word
sync word
no preamble (1 batch)
no preamble
or sync word
(3 batches)
short fade recovery
transmitter off
preamble receive 2
sync word
sync word
sync
word
no sync
word
TX off time out
preamble
preamble
preamble
preamble
no preamble
(1 batch)
MGD269
batch zero detect
preamble receive 1
long fade recovery
carrier detect
switch on
preamble
cycle receive
8.14
APOC-1 synchronization strategy
The synchronization strategy in APOC-1 is an extended
version of the ACCESS
scheme and is illustrated in Fig.5.
The PCD5002 counts the number of batches in a
transmission, starting from the first batch received after
preamble. Counter overflow occurs due to the size of a
cycle, as determined by SPF programming.
Initially, after switching to the ON status, the decoder will
be in the
switch-on
mode. Here the receiver will be
enabled for up to 3 batches, testing for preamble and sync
word. Detection of preamble causes the device to switch
to the ‘preamble receive’ mode, while any enabled sync
word enters the ‘batch zero detect’ mode. Failure to detect
either will cause the device to switch to the ‘carrier detect’
mode.
In the
preamble receive 1
mode the PCD5002 searches
for a sync word, the receiver remaining enabled while
preamble is detected. As soon as an enabled sync word is
found the ‘batch zero identify’ mode is started.
If preamble is not found within one batch duration then the
‘long fade recovery’ mode is entered.
When in
batch zero detect
mode the PCD5002 switches
on every batch to maintain synchronization and check for
the batch zero identifier. Detection of the batch zero
identifier activates the ‘cycle receive’ mode. When
synchronization is lost the ‘long fade recovery’ mode is
entered. ‘preamble receive’ mode is entered when
preamble is detected.
In the
batch zero identify
mode the first codeword
immediately after the sync word of the first batch is
compared with the programmed batch zero identifier.
Failure to detect the batch zero identifier will cause the
device to enter the ‘short fade recovery’ mode.
When this comparison is successful the function bits
determine whether any broadcast message will follow.
Any function bit combination other than ‘1,1’ will cause the
PCD5002 to accept message codewords until terminated
by a valid address codeword.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PCD5002H | Advanced POCSAG and APOC-1 Paging Decoder |
| PCD5 | Fuse |
| PCB1 | Fuse |
| PCB2 | Fuse |
| PCB2.5 | Fuse |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PCD5002A | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Enhanced Pager Decoder for APOC1/POCSAG |
| PCD5002AH | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Enhanced Pager Decoder for APOC1/POCSAG |
| PCD5002H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Advanced POCSAG and APOC-1 Paging Decoder |
| PCD5002HBD-S | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication Decoder |
| PCD5002HBD-T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication Decoder |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。