參數(shù)資料
型號(hào)： PCI6421
廠(chǎng)商： Texas Instruments, Inc.
英文描述： DUAL/SINGLE SOCKET CARDBUS AND ULTRAMEDIA CONTROLLER
中文描述： 雙/單插槽CardBus和UltraMedia控制器
文件頁(yè)數(shù)： 73/204頁(yè)
文件大?。?/td> 860K
代理商： PCI6421
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)當(dāng)前第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)第160頁(yè)第161頁(yè)第162頁(yè)第163頁(yè)第164頁(yè)第165頁(yè)第166頁(yè)第167頁(yè)第168頁(yè)第169頁(yè)第170頁(yè)第171頁(yè)第172頁(yè)第173頁(yè)第174頁(yè)第175頁(yè)第176頁(yè)第177頁(yè)第178頁(yè)第179頁(yè)第180頁(yè)第181頁(yè)第182頁(yè)第183頁(yè)第184頁(yè)第185頁(yè)第186頁(yè)第187頁(yè)第188頁(yè)第189頁(yè)第190頁(yè)第191頁(yè)第192頁(yè)第193頁(yè)第194頁(yè)第195頁(yè)第196頁(yè)第197頁(yè)第198頁(yè)第199頁(yè)第200頁(yè)第201頁(yè)第202頁(yè)第203頁(yè)第204頁(yè)
325
Table 317. Function 5 Power-Management Registers
REGISTER NAME
OFFSET
Power-management capabilities
Next item pointer
Capability ID
44h
Data
Power-management control/status register bridge support extensions
Power-management control/status (CSR)
48h
3.8.9
CardBus Bridge Power Management
The
PCI Bus Power Management Interface Specification for PCI to CardBus Bridges
was approved by PCMCIA in
December of 1997. This specification follows the device and bus state definitions provided in the
PCI Bus Power
Management Interface Specification
published by the PCI Special Interest Group (SIG). The main issue addressed
in the
PCI Bus Power Management Interface Specification for PCI to CardBus Bridges
is wake-up from D3
hot
or D3
cold
without losing wake-up context (also called PME context).
The specific issues addressed by the
PCI Bus Power Management Interface Specification for PCI to CardBus Bridges
for D3 wake-up are as follows:
Preservation of device context. The specification states that a reset must occur during the transition from
D3 to D0. Some method to preserve wake-up context must be implemented so that the reset does not clear
the PME context registers.
Power source in D3
cold
if wake-up support is required from this state.
The Texas Instruments PCI6x21/PCI6x11 controller addresses these D3 wake-up issues in the following manner:
Two resets are provided to handle preservation of PME context bits:
Global reset (GRST) is used only on the initial boot up of the system after power up. It places the
PCI6x21/PCI6x11 controller in its default state and requires BIOS to configure the controller before
becoming fully functional.
PCI reset (PRST) has dual functionality based on whether PME is enabled or not. If PME is enabled,
then PME context is preserved. If PME is not enabled, then PRST acts the same as a normal PCI reset.
Please see the master list of PME context bits in Section 3.8.11.
Power source in D3
cold
if wake-up support is required from this state. Since V
CC
is removed in D3
cold
, an
auxiliary power source must be supplied to the PCI6x21/PCI6x11 V
CC
terminals. Consult the
PCI14xx
Implementation Guide for D3 Wake-Up
or the
PCI Power Management Interface Specification for PCI to
CardBus Bridges
for further information.
3.8.10 ACPI Support
The
Advanced Configuration and Power Interface (ACPI) Specification
provides a mechanism that allows unique
pieces of hardware to be described to the ACPI driver. The PCI6x21/PCI6x11 controller offers a generic interface that
is compliant with ACPI design rules.
Two doublewords of general-purpose ACPI programming bits reside in PCI6x21/PCI6x11 PCI configuration space
at offset 88h. The programming model is broken into status and control functions. In compliance with ACPI, the top
level event status and enable bits reside in the general-purpose event status register (PCI offset 88h, see
Section 4.32) and general-purpose event enable register (PCI offset 89h, see Section 4.33). The status and enable
bits are implemented as defined by ACPI and illustrated in Figure 315.
Event Output
Event Input
Enable Bit
Status Bit
Figure 315. Block Diagram of a Status/Enable Cell
The status and enable bits generate an event that allows the ACPI driver to call a control method associated with the
pending status bit. The control method can then control the hardware by manipulating the hardware control bits or
相關(guān)PDF資料
PDF描述
PCI6611 DUAL/SINGLE SOCKET CARDBUS AND ULTRAMEDIA CONTROLLER
PCI6621 DUAL/SINGLE SOCKET CARDBUS AND ULTRAMEDIA CONTROLLER
PCI6515 SINGLE SOCKET CARDBUS CONTROLLER WITH DEDICATED SMART CARD SOCKET
PCI6515GHK SINGLE SOCKET CARDBUS CONTROLLER WITH DEDICATED SMART CARD SOCKET
PCI6515ZHK SINGLE SOCKET CARDBUS CONTROLLER WITH DEDICATED SMART CARD SOCKET
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PCI6421GHK 制造商:Texas Instruments 功能描述:DUAL/SGL SCKT CARDBUS AND ULTRAMEDIA CNTRLR W/ DEDICATED FLA - Trays
PCI6421ZHK 制造商:Texas Instruments 功能描述:DUAL/SGL SCKT CARDBUS AND ULTRAMEDIA CNTRLR W/ DEDICATED FLA - Trays
PCI6466 制造商:PLX 制造商全稱(chēng):PLX 功能描述:Dual-Mode (Transparent & Non-Transparent) Universal FastLane⑩ 64-bit, 66MHz PCI-to-PCI Bridge
PCI6466-CB66BI 功能描述:多路器開(kāi)關(guān) IC PCI to PCI Bridge 64 Bit 66MHz RoHS:否 制造商:Texas Instruments 通道數(shù)量:1 開(kāi)關(guān)數(shù)量:4 開(kāi)啟電阻（最大值）:7 Ohms 開(kāi)啟時(shí)間（最大值）: 關(guān)閉時(shí)間（最大值）: 傳播延遲時(shí)間:0.25 ns 工作電源電壓:2.3 V to 3.6 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UQFN-16
PCI6466-CB66BI G 制造商:PLX Technology 功能描述:IC PCI TO PCI BRIDGE 380HSBGA
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠(chǎng)商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*