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| 型號： | PCI6421 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | DUAL/SINGLE SOCKET CARDBUS AND ULTRAMEDIA CONTROLLER |
| 中文描述： | 雙/單插槽CardBus和UltraMedia控制器 |
| 文件頁數(shù)： | 97/204頁 |
| 文件大?。?/td> | 860K |
| 代理商： | PCI6421 |
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421
4.31 General Control Register
The general control register provides top level PCI arbitration control. It also provides the ability to disable the 1394
OHCI function and provides control over miscellaneous new functionality. See Table 49 for a complete description
of the register contents.
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Name
General control
Type
R
R
RW
RW
RW
RW
R
R
R
R
RW
RW
RW
R
RW
RW
Default
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
Register:
Offset:
Type:
Default:
General control
86h
Read/Write, Read-only
0080h
Table 49. General Control Register Description
BIT
SIGNAL
TYPE
FUNCTION
15
FM_PWR_CTRL
_POL
RW
Flash media power control pin polarity. This bit controls the polarity of the MC_PWR_CTRL_0 and
MC_PWR_CTRL_1 terminals.
0 = MC_PWR_CTRL_x terminals are active low (default)
1 = MC_PWR_CTRL_x terminals are active high
14
SC_IF_SEL
RWU
Smart Card interface select. This bit controls the selection of the dedicated Smart Card interface
used by the controller.
0 = EMV interface selected (default)
1 = PCI7x10-style interface selected
Note: The PCI7x10-style interface is only allowed when bits 98 (FM_IF_SEL field) are 01. If bits
98 contain any other value, then this bit is 0. Care must be taken in the design to ensure that this
bit can be set to 1 at the same time that bits 98 are set to 01.
13
SIM_MODE
RW
When this bit is set, it reduces the query time for UltraMedia card types.
0 = Query time is unaffected (default)
1 = Query time is reduced for simulation purposes
12
IO_LIMIT_SEL
RW
When this bit is set, bit 0 in the I/O limit registers (PCI offsets 30h and 38h) for both CardBus functions
is set.
0 = Bit 0 in the I/O limit registers is 0 (default)
1 = Bit 0 in the I/O limit registers is 1
11
IO_BASE_SEL
RW
When this bit is set, bit 0 in the I/O base registers (PCI offsets 2Ch and 34h) for both CardBus functions
is set.
0 = Bit 0 in the I/O base registers is 0 (default)
1 = Bit 0 in the I/O base registers is 1
10
12V_SW_SEL
RW
Power switch select. This bit selects which power switch is implemented in the system.
0 = A 1.8-V capable power switch (TPS2228) is used (default)
1 = A 12-V capable power switch (TPS2226) is used
98
FM_IF_SEL
RW
Dedicated flash media interface selection. This field controls the mode of the dedicated flash media
interface.
00 = Flash media interface configured as SD/MMC socket + MS socket (default)
01 = Flash media interface configured as 2-in-1 (SD/MMC, MS) socket
10 = Flash media interface configured as 3-in-1 (SD/MMC, MS, SM/XD) socket
11 = Reserved
7
DISABLE_SC
RW
When this bit is set, the Smart Card function is completely nonaccessible and nonfunctional.
6
DISABLE_SD
RW
When this bit is set, the SD host controller function is completely nonaccessible and nonfunctional.
5
DISABLE_FM
RW
When this bit is set, the flash media function is completely nonaccessible and nonfunctional.
4
DISABLE_SKTB
RW
When this bit is set, CardBus socket B (function 1) is completely nonaccessible and nonfunctional.
3
DISABLE_OHCI
RW
When this bit is set, the OHCI 1394 controller function is completely nonaccessible and nonfunctional.
One or more bits in this register are cleared only by the assertion of GRST.
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