![](http://datasheet.mmic.net.cn/330000/PCI6421_datasheet_16443878/PCI6421_6.png)
vi
Section
Title
Page
4.49
4.50
ExCA Compatibility Registers (Functions 0 and 1)
5.1
ExCA Identification and Revision Register
5.2
ExCA Interface Status Register
5.3
ExCA Power Control Register
5.4
ExCA Interrupt and General Control Register
5.5
ExCA Card Status-Change Register
5.6
ExCA Card Status-Change Interrupt Configuration Register
5.7
ExCA Address Window Enable Register
5.8
ExCA I/O Window Control Register
5.9
ExCA I/O Windows 0 and 1 Start-Address Low-Byte Registers
5.10
ExCA I/O Windows 0 and 1 Start-Address High-Byte Registers
5.11
ExCA I/O Windows 0 and 1 End-Address Low-Byte Registers
5.12
ExCA I/O Windows 0 and 1 End-Address High-Byte Registers
5.13
ExCA Memory Windows 04 Start-Address Low-Byte Registers
5.14
ExCA Memory Windows 04 Start-Address High-Byte Registers
5.15
ExCA Memory Windows 04 End-Address Low-Byte Registers
5.16
ExCA Memory Windows 04 End-Address High-Byte Registers
5.17
ExCA Memory Windows 04 Offset-Address Low-Byte Registers
5.18
ExCA Memory Windows 04 Offset-Address High-Byte Registers
5.19
ExCA Card Detect and General Control Register
5.20
ExCA Global Control Register
5.21
ExCA I/O Windows 0 and 1 Offset-Address Low-Byte Registers
5.22
ExCA I/O Windows 0 and 1 Offset-Address High-Byte Registers
5.23
ExCA Memory Windows 04 Page Registers
CardBus Socket Registers (Functions 0 and 1)
6.1
Socket Event Register
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.2
Socket Mask Register
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.3
Socket Present State Register
6.4
Socket Force Event Register
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.5
Socket Control Register
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.6
Socket Power Management Register
Flash Media Controller Programming Model
7.1
Vendor ID Register
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.2
Device ID Register
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.3
Command Register
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.4
Status Register
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.5
Class Code and Revision ID Register
7.6
Latency Timer and Class Cache Line Size Register
7.7
Header Type and BIST Register
7.8
Flash Media Base Address Register
Serial Bus Slave Address Register
Serial Bus Control/Status Register
435
436
51
55
56
57
58
59
510
511
512
513
513
514
514
515
516
517
518
519
520
521
522
523
523
524
61
62
63
64
65
67
68
71
72
72
73
74
75
75
76
76
. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . .
5
. . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . .
. . . .
. . . . .
. . . .
. . .
. . .
. . . .
. . .
. .
.
. . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . .
. . .
. . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . .
6
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . .
7
. . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . .