參數(shù)資料
型號(hào)： PCM1602APTG4
廠商： Texas Instruments
文件頁數(shù)： 10/46頁
文件大?。?/td> 0K
描述： IC DAC 24BIT 6CH 192KHZ 48-LQFP
產(chǎn)品培訓(xùn)模塊： Data Converter Basics
標(biāo)準(zhǔn)包裝： 250
位數(shù)： 24
數(shù)據(jù)接口： 串行
轉(zhuǎn)換器數(shù)目： 6
電壓電源： 模擬和數(shù)字
功率耗散（最大）： 240mW
工作溫度： -25°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 48-LQFP
供應(yīng)商設(shè)備封裝： 48-LQFP（7x7）
包裝： 帶卷 (TR)
輸出數(shù)目和類型： 6 電壓，單極
采樣率（每秒）： 192k
配用： DEM-DAI1602-ND - EVAL FIXTURE FOR PCM1602
R0001-02
IDX6
MSB
LSB
IDX5
IDX4
R/W
IDX3
IDX2
IDX1
IDX0
D7
D6
D5
D4
D3
D2
D1
D0
Register Index (or Address)
Register Data
Read/Write Operation
0 = Write Operation
1 = Read Operation (Register Index is Ignored)
IDX0
D7
D6
D4
D5
D3
D2
D1
D0
R/W
ML
MC
MDI
X
R/W IDX6
X
IDX1
IDX2
IDX3
IDX4
IDX5
IDX6
X
T0048-02
SLES146A – AUGUST 2005 – REVISED OCTOBER 2010
www.ti.com
SERIAL CONTROL INTERFACE
The serial control interface is a 4-wire synchronous serial port that operates asynchronously to the serial audio
interface. The serial control interface is used to program and read the on-chip mode registers. The control
interface includes MDO (pin 33), MDI (pin 34), MC (pin 35), and ML (pin 36). MDO is the serial data output, used
to read back the values of the mode registers; MDI is the serial data input, used to program the mode registers;
MC is the serial bit clock, used to shift data in and out of the control port; and ML is the control port latch clock.
REGISTER WRITE OPERATION
All write operations for the serial control port use 16-bit data words. Figure 24 shows the control data word
format. The most significant bit is the read/write R/W) bit. When set to 0, this bit indicates a write operation.
Seven bits, labeled IDX[6:0], set the register index (or address) for the write operation. The least significant eight
bits, D[7:0], contain the data to be written to the register specified by IDX[6:0].
Figure 25 shows the functional timing diagram for writing to the serial control port. ML is held at a logic-1 state
until a register is to be written. To start the register write cycle, ML is set to logic-0. Sixteen clocks are then
provided on MC, corresponding to the 16 bits of the control data word on MDI. After the sixteenth clock cycle has
completed, ML is set to logic-1 to latch the data into the indexed mode control register.
Figure 24. Control Data Word Format for MDI
Figure 25. Write Operation Timing
SINGLE REGISTER READ OPERATION
Read operations use the 16-bit control word format shown in Figure 24. For read operations, the R/W bit is set
to 1. Read operations ignore the index bits, IDX[6:0], of the control data word. Instead, the REG[6:0] bits in
control register 11 are used to set the index of the register that is to be read during the read operation. Bits
IDX[6:0] should be set to 00h for read operations.
The details of the read operation are shown in Figure 26. First, control register 11 must be written with the index
of the register to be read back. Additionally, the INC bit must be set to logic-0 in order to disable the
auto-increment read function. The read cycle is then initiated by setting ML to logic-0 and setting the R/W bit of
the control data word to logic-1, indicating a read operation. MDO remains in a high-impedance state until the
last eight bits of the 16-bit read cycle, which correspond to the eight data bits of the register indexed by the
REG[6:0] bits of control register 11. The read cycle is completed when ML is set to 1, immediately after the MC
clock cycle for the least-significant bit of the indexed control register has completed.
18
Copyright 2005–2010, Texas Instruments Incorporated
Product Folder Link(s): PCM1602A
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